Cubic-phase zirconia nano-island growth using atomic layer deposition and application in low-power charge-trapping nonvolatile-memory devices.

The manipulation of matter at the nanoscale enables the generation of properties in a material that would otherwise be challenging or impossible to realize in the bulk state. Here, we demonstrate growth of zirconia nano-islands using atomic layer deposition on different substrate terminations. Transmission electron microscopy and Raman measurements indicate that the nano-islands consist of nano-crystallites of the cubic-crystalline phase, which results in a higher dielectric constant (κ ∼ 35) than the amorphous phase case (κ ∼ 20).

~3-nm ZnO Nanoislands Deposition and Application in Charge Trapping Memory Grown by Single ALD Step.

Low-dimensional semiconductor nanostructures are of great interest in high performance electronic and photonic devices. ZnO is considered to be a multifunctional material due to its unique properties with potential in various applications. In this work, 3-nm ZnO nanoislands are deposited by Atomic Layer Deposition (ALD) and the electronic properties are characterized by UV-Vis-NIR Spectrophotometer and X-ray Photoelectron Spectroscopy.

1D versus 3D quantum confinement in 1-5 nm ZnO nanoparticle agglomerations for application in charge-trapping memory devices.

ZnO nanoparticles (NPs) have attracted considerable interest from industry and researchers due to their excellent properties with applications in optoelectronic devices, sunscreens, photocatalysts, sensors, biomedical sciences, etc. However, the agglomeration of NPs is considered to be a limiting factor since it can affect the desirable physical and electronic properties of the NPs. In this work, 1-5 nm ZnO NPs deposited by spin- and dip-coating techniques are studied.

Enhanced non-volatile memory characteristics with quattro-layer graphene nanoplatelets vs. 2.85-nm Si nanoparticles with asymmetric Al2O 3/HfO 2 tunnel oxide.

In this work, we demonstrate a non-volatile metal-oxide semiconductor (MOS) memory with Quattro-layer graphene nanoplatelets as charge storage layer with asymmetric Al2O3/HfO2 tunnel oxide and we compare it to the same memory structure with 2.85-nm Si nanoparticles charge trapping layer. The results show that graphene nanoplatelets with Al2O3/HfO2 tunnel oxide allow for larger memory windows at the same operating voltages, enhanced retention, and endurance characteristics.