2 results match your criteria: "London Centre For Nanotechnology 19 Gordon St[Affiliation]"

We demonstrate a direct mapping of max k-SAT problems (and weighted max k-SAT) to a Chimera graph, which is the non-planar hardware graph of the devices built by D-Wave Systems Inc. We further show that this mapping can be used to map a similar class of maximum satisfiability problems where the clauses are replaced by parity checks over potentially large numbers of bits. The latter is of specific interest for applications in decoding for communication.

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Optimisation problems typically involve finding the ground state (i.e. the minimum energy configuration) of a cost function with respect to many variables.

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