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Ultrasmall-scale semiconductor devices (≤5 nm) are advancing technologies, such as artificial intelligence and the Internet of Things. However, the further scaling of these devices poses critical challenges, such as interface properties and oxide quality, particularly at the high-/semiconductor interface in metal-oxide-semiconductor (MOS) devices. Existing interlayer (IL) methods, typically exceeding 1 nm thickness, are unsuitable for ultrasmall-scale devices.

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