The failure of different chips under working conditions is influenced by various stress states such as different voltages, temperatures, stress durations, and stress variations. Therefore, the failure time has a great degree of dispersion, and similar chips may exhibit different failure mechanisms due to variations in their working environments. This paper proposes three system-on-chip reliability failure prediction unit circuits: the time-dependent dielectric breakdown prediction circuit, the negative bias temperature instability prediction circuit, and the hot carrier injection prediction circuit. These circuits are embedded within the main chip, enabling real-time failure prediction and reliability mechanism diagnosis in the same working environment as the main chip. The three reliability failure prediction circuits are compact and energy efficient, allowing for their integration into a system on a chip as IP cores that provide early warning signals before system-on-chip failure. Compared to traditional reliability prediction methods, this approach offers the advantages of accurately identifying failure mechanisms, predicting failure times, and enabling real-time online monitoring.

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http://dx.doi.org/10.3390/mi16010004DOI Listing

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