The increasing demand for processing large volumes of data for machine learning (ML) models has pushed data bandwidth requirements beyond the capability of traditional von Neumann architecture. In-memory computing (IMC) has recently emerged as a promising solution to address this gap by enabling distributed data storage and processing at the micro-architectural level, significantly reducing both latency and energy. In this article, we present In-Memory comPuting architecture based on Y-FlAsh technology for Coalesced Tsetlin machine inference (IMPACT), underpinned on a cutting-edge memory device, Y-Flash, fabricated on a 180 nm complementary metal oxide semiconductor (CMOS) process. Y-Flash devices have recently been demonstrated for digital and analogue memory applications; they offer high yield, non-volatility and low power consumption. IMPACT leverages the Y-Flash array to implement the inference of a novel ML algorithm: coalesced Tsetlin machine (CoTM) based on propositional logic. CoTM utilizes Tsetlin automata (TA) to create Boolean feature selections stochastically across parallel clauses. IMPACT is organized into two computational crossbars for storing the TA and weights. Through validation on the MNIST dataset, IMPACT achieved [Formula: see text] accuracy. IMPACT demonstrated improvements in energy efficiency, e.g. factors of 2.23 over CNN-based ReRAM, 2.46 over neuromorphic using NOR-Flash and 2.06 over DNN-based phase-change memory (PCM), suited for modern ML inference applications.This article is part of the theme issue 'Emerging technologies for future secure computing platforms'.
Download full-text PDF |
Source |
---|---|
http://dx.doi.org/10.1098/rsta.2023.0393 | DOI Listing |
Philos Trans A Math Phys Eng Sci
January 2025
Microsystems Group, School of Engineering, Newcastle University, Newcastle upon Tyne NE1 7RU, UK.
The increasing demand for processing large volumes of data for machine learning (ML) models has pushed data bandwidth requirements beyond the capability of traditional von Neumann architecture. In-memory computing (IMC) has recently emerged as a promising solution to address this gap by enabling distributed data storage and processing at the micro-architectural level, significantly reducing both latency and energy. In this article, we present In-Memory comPuting architecture based on Y-FlAsh technology for Coalesced Tsetlin machine inference (IMPACT), underpinned on a cutting-edge memory device, Y-Flash, fabricated on a 180 nm complementary metal oxide semiconductor (CMOS) process.
View Article and Find Full Text PDFPhilos Trans A Math Phys Eng Sci
January 2025
Institute for Solid State Physics, Friedrich Schiller University Jena, Jena, Germany.
Memristive technology mitigates the memory wall issue in von Neumann architectures by enabling in-memory data processing. Unlike traditional complementary metal-oxide semiconductor (CMOS) technology, memristors provide a new paradigm for implementing cryptographic functions and security considerations. While prior research explores memristors for cryptographic functions and side-channel attack vulnerabilities, our study uniquely addresses memristor-oriented countermeasures.
View Article and Find Full Text PDFPhilos Trans A Math Phys Eng Sci
January 2025
RPTU Kaiserslautern-Landau, Kaiserslautern, Germany.
The advent of in-memory computing has introduced a new paradigm of computation, which offers significant improvements in terms of latency and power consumption for emerging embedded AI accelerators. Nevertheless, the effect of the hardware variations and non-idealities of the emerging memory technologies may significantly compromise the accuracy of inferred neural networks and result in malfunctions in safety-critical applications. This article addresses the issue from three different perspectives.
View Article and Find Full Text PDFPhilos Trans A Math Phys Eng Sci
January 2025
IBM Research-Europe, 8803 Rüschlikon, Zurich, Switzerland.
Encryption and decryption of data with very low latency and high energy efficiency is desirable in almost every application that deals with sensitive data. The advanced encryption standard (AES) is a widely adopted algorithm in symmetric key cryptography with numerous efficient implementations. Nonetheless, in scenarios involving extensive data processing, the primary limitations on performance and efficiency arise from data movement between memory and the processor, rather than data processing itself.
View Article and Find Full Text PDFPhilos Trans A Math Phys Eng Sci
January 2025
RWTH Aachen University, Aachen, Germany.
Resistive random access memory (ReRAM) holds promise for building computing-in-memory (CIM) architectures to execute machine learning (ML) applications. However, existing ReRAM technology faces challenges such as cell and cycle variability, read-disturb and limited endurance, necessitating improvements in devices, algorithms and applications. Understanding the behaviour of ReRAM technologies is crucial for advancement.
View Article and Find Full Text PDFEnter search terms and have AI summaries delivered each week - change queries or unsubscribe any time!