Edge detection is one of the most essential research hotspots in computer vision and has a wide variety of applications, such as image segmentation, target detection, and other high-level image processing technologies. However, efficient edge detection is difficult in a resource-constrained environment, especially edge-computing hardware. Here, we report a low-power edge detection hardware system based on HfO-based ferroelectric field-effect transistor, which is one of the most potential non-volatile memories for energy-efficient computing. Different from the conventional edge detectors requiring sophisticated hardware for the complex operation such as convolution and gradient, the proposed edge detector is analogue-to-digital converter free and loaded into a multi-bit content addressable memory, which only needs one 4 × 4 ferroelectric field-effect transistor NAND array. The experimental results show that the proposed hardware system is able to achieve efficient image edge detection at low power consumption (~10 fJ/per operation), realizing no-accuracy-loss, low-power and analogue-to-digital-converter-free hardware system, providing a feasible solution for edge computing.

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http://www.ncbi.nlm.nih.gov/pmc/articles/PMC11723923PMC
http://dx.doi.org/10.1038/s41467-024-55224-8DOI Listing

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