A low switching loss GaN trench MOSFET design utilizing a triple-shield structure.

Sci Rep

College of Physics and Electronic Information, Baicheng Normal University, Jilin, 137000, China.

Published: January 2025

An innovative GaN trench MOSFET featuring an ultra-low gate-drain charge (Q) is proposed, with its operational mechanisms thoroughly investigated using TCAD simulations. This novel MOSFET design introduces a triple-shield structure (BPSG-MOS) comprising three critical components: (1) a grounded split gate (SG), (2) a P+ shield region (PSR), and (3) a semi-wrapped BP layer that extends the P-shield beneath the gate and along the sidewalls of the trench gate. Both the SG and PSR effectively reduce gate-drain coupling, transforming most of the gate-drain capacitance (C) into a series combination of gate-source capacitance (C) and drain-source capacitance (C). Furthermore, the BP layer refines the gate-drain capacitance by converting the C at the trench gate sidewalls into C. This configuration significantly lowers C, resulting in an ultra-low Q. Compared to the dual-shield MOSFET (PSGT-MOS) and the conventional trench MOSFET (TG-MOS), the BPSG-MOS achieves reductions in C by 81% and 98%, respectively.

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http://www.ncbi.nlm.nih.gov/pmc/articles/PMC11696899PMC
http://dx.doi.org/10.1038/s41598-024-84007-wDOI Listing

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