Scaling of N-Type Field-Effect Transistors Based on Aligned Carbon Nanotube Arrays.

ACS Appl Mater Interfaces

Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics, School of Electronics, Peking University, Beijing 100871, China.

Published: October 2024

AI Article Synopsis

  • - Wafer-scale aligned carbon nanotubes (A-CNTs) are being explored as high-performance materials for future CMOS transistors in integrated circuits, especially in creating p-type field-effect transistors (P-FETs) that perform well at small scales.
  • - Researchers have successfully created top-gated n-type FETs (N-FETs) using A-CNTs with scandium contacts, achieving impressive results like over 1 mA/μm on-state current and 0.4 mS/μm peak transconductance.
  • - However, the N-FETs exhibited unusual scaling issues due to oxidation at the contacts, which complicates scaling both gate and contact lengths, highlighting the need to

Article Abstract

Wafer-scale aligned carbon nanotubes (A-CNTs) are promising candidate semiconductors for building high-performance complementary metal-oxide-semiconductor (CMOS) transistors for future integrated circuits (ICs). A-CNT-based p-type field-effect transistors (P-FETs) have demonstrated excellent performance and scalability down to sub-10 nm nodes. However, the development of A-CNT n-type FETs (N-FETs) lags far behind, in regard to their electronic performance and device scaling. In this work, we fabricated top-gated N-FETs based on A-CNTs with a scandium (Sc)-contacted source and drain. High-performance A-CNT N-FETs were demonstrated with record on-state current () exceeding 1 mA/μm and peak transconductance () of 0.4 mS/μm. Interestingly, the A-CNT N-FETs exhibited abnormal scaling behavior owing to the lateral oxidation of low-work function source/drain contacts, leading to formidable challenges to scale both the gate length () and the contact length () at the same time. Understanding of the abnormal scaling behavior contributes to seeking solutions for high-performance A-CNT N-FETs, and it paves the way for future CNT CMOS digital IC technology.

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http://dx.doi.org/10.1021/acsami.4c11320DOI Listing

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Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics, School of Electronics, Peking University, Beijing 100871, China.

Article Synopsis
  • - Wafer-scale aligned carbon nanotubes (A-CNTs) are being explored as high-performance materials for future CMOS transistors in integrated circuits, especially in creating p-type field-effect transistors (P-FETs) that perform well at small scales.
  • - Researchers have successfully created top-gated n-type FETs (N-FETs) using A-CNTs with scandium contacts, achieving impressive results like over 1 mA/μm on-state current and 0.4 mS/μm peak transconductance.
  • - However, the N-FETs exhibited unusual scaling issues due to oxidation at the contacts, which complicates scaling both gate and contact lengths, highlighting the need to
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