Two-dimensional van der Waals semiconductors are promising for future nanoelectronics. However, integrating high-k gate dielectrics for device applications is challenging as the inert van der Waals material surfaces hinder uniform dielectric growth. Here, we report a liquid metal oxide-assisted approach to integrate ultrathin, high-k HfO dielectric on 2D semiconductors with atomically smooth interfaces. Using this approach, we fabricated 2D WS top-gated transistors with subthreshold swings down to 74.5 mV/dec, gate leakage current density below 10 A/cm, and negligible hysteresis. We further demonstrate a one-step van der Waals integration of contacts and dielectrics on graphene. This can offer a scalable approach toward integrating entire prefabricated device stack arrays with 2D materials. Our work provides a scalable solution to address the crucial dielectric engineering challenge for 2D semiconductor-based electronics.
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http://dx.doi.org/10.1021/acsnano.4c08554 | DOI Listing |
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