With the increasing demand for highly efficient lighting in the automotive industry, flip-chip light-emitting diodes (LEDs) have become widely used for both interior and exterior lighting. Solder, serving as a crucial interconnecting material, often develops voids during the reflow process, compromising the integrity and reliability of the connections. Thus, understanding the impact of these voids on the mechanical and thermal properties of the product is vital for improving reliability accuracy. This work employs computational methods alongside experimental approaches to address the challenges of replicating solder voids and controlling the solder void fraction. A comprehensive study investigates the effects of solder voids on shearing properties and thermal conductance. Random voids were introduced into the solder pads of an LED assembly within a finite element model (FEM), leading to predictions of maximum shear stress and LED junction temperature. The findings correlate well with the experimental data, validating the FEM's applicability. Furthermore, a statistical analysis was conducted to explore the relationship between solder void fraction, position, and size, aiming to provide objective guidelines for analyzing soldered assembly tomography in reliability assessments.
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http://dx.doi.org/10.1016/j.heliyon.2024.e33242 | DOI Listing |
Sensors (Basel)
September 2024
Faculty of Information Engineering and Automation, Kunming University of Science and Technology, Kunming 650500, China.
As semiconductor chip manufacturing technology advances, chip structures are becoming more complex, leading to an increased likelihood of void defects in the solder layer during packaging. However, identifying void defects in packaged chips remains a significant challenge due to the complex chip background, varying defect sizes and shapes, and blurred boundaries between voids and their surroundings. To address these challenges, we present a deep-learning-based framework for void defect segmentation in chip packaging.
View Article and Find Full Text PDFSci Rep
August 2024
School of Electrical Engineering, Chongqing University of Science and Technology, Chongqing, 404100, People's Republic of China.
Printed Circuit Boards (PCBs) are the foundational component of electronic devices, and the detection of PCB defects is essential for ensuring the quality control of electronic products. Aiming at the problem that the existing PCB plug-in solder defect detection algorithms cannot meet the requirements of high precision, low false alarm rate, and high speed at the same time, this paper proposes a method based on spatial convolution pooling and information fusion. Firstly, on the basis of YOLOv3, an attention-guided pyramid structure is used to fuse context information, and multiple convolutions of different size are used to explore richer high-level semantic information; Secondly, a coordinated attention network structure is introduced to calibrate the fused pyramidal feature information, highlighting the important feature channels, and reducing the adverse impact of redundant parameters generated by feature fusion; Finally, the ASPP (Atrous Spatial Pyramid Pooling) structure is implemented in the original Darknet53 backbone feature extraction network to acquire multi-scale feature information of the detection targets.
View Article and Find Full Text PDFMaterials (Basel)
July 2024
Regional Industry Innovation Department (Growth Engine), Korea Institute of Industrial Technology, Incheon 21999, Republic of Korea.
In this study, we investigated the brittle fracture behavior of Sn-3.0Ag-0.5Cu (SAC305) solder joints with a Direct Electroless Gold (DEG) surface finish, formed using laser-assisted bonding (LAB) and mass reflow (MR) techniques.
View Article and Find Full Text PDFHeliyon
July 2024
Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, Guilin, 541004, China.
The presence of voids in a solder layer affects the thermal reliability of an insulated-gate bipolar transistor (IGBT). In this work, the effects of the size and fraction of solder layer voids and the power losses of chips on heat flow distribution, junction temperature and thermal resistance were investigated. It was found that it was difficult for the heat to flow through the voids due to the high thermal resistance of air.
View Article and Find Full Text PDFHeliyon
June 2024
Seoul National University & RIAM, 1 Gwanak-ro, Gwanak-gu, Seoul, 08826, Republic of Korea.
With the increasing demand for highly efficient lighting in the automotive industry, flip-chip light-emitting diodes (LEDs) have become widely used for both interior and exterior lighting. Solder, serving as a crucial interconnecting material, often develops voids during the reflow process, compromising the integrity and reliability of the connections. Thus, understanding the impact of these voids on the mechanical and thermal properties of the product is vital for improving reliability accuracy.
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