Enhance Carrier Diffusion of Monolayer MoSe by Interface Engineering.

ACS Appl Mater Interfaces

Key Laboratory of Luminescence and Optical Information, Ministry of Education, Institute of Optoelectronic Technology, Beijing Jiaotong University, Beijing 100044, China.

Published: July 2024

Two-dimensional materials hold great potentials for beyond-CMOS (complementary metal-oxide-semiconductor) electronical and optoelectrical applications, and the development of field effect transistors (FET) with excellent performance using such materials is of particular interest. How to improve the performance of devices thus becomes an urgent issue. The performance of FETs depends greatly on the intrinsic electrical properties of the channel materials, meanwhile the device interface quality, such as extrinsic scattering of charged impurities, charge traps, and substrate surface roughness have a great influence on the performance. In this paper, the impact of the interface quality on the carrier diffusion behaviors of monolayer (ML) MoSe has been investigated by using an in situ ultrafast laser technique to avoid the surface contamination during device fabrication process. Two types of self-assembled monolayers (SAMs) are introduced to modify the gate dielectric surface through an interface engineering approach to obtain chemical-stable interfaces. The results showed that the transport properties of ML MoSe were enhanced after interface engineering, for example, the carrier mobility of ML MoSe was improved from ∼59.4 to ∼166.5 cm V s after the SAM modification. Meanwhile, the photocarrier dynamics of ML MoSe before and after interfacial engineering were also carefully studied. Our studies provide a feasible method for improving the carrier diffusion behaviors of such materials, and making them suited for application in future integrated circuit.

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http://dx.doi.org/10.1021/acsami.4c05143DOI Listing

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