Introduction: Design fluency (DF) tasks are commonly used to assess executive functions such as attentional control, cognitive flexibility, self-monitoring and strategy use. Next to the total number of correct designs, the standard outcome of a DF task, clustering and switching can help disentangle the processes underlying DF performance. We present the first longitudinal study of 4-8-year-old children's developmental DF trajectories.
Method: At initial enrollment, children ( = 228) were aged between 4.05 and 6.88 years ( = 5.18, SD = 0.59) and attended Dutch primary schools. The DF task was administered at three time points, each time point separated by approximately 1 year. Data were analyzed using mixed regression for total number of correct designs and switching, and mixed logistic regression analysis for clustering.
Results: The total number of correct designs increased linearly across the three time points. Across all time points, children made very few clusters, and most clusters consisted of only 3 designs. Clustering only increased at the third assessment compared to the two previous assessments. Switching increased up to the second assessment, but not after that. The number of switches was highly correlated with the total number of correct designs at all time points ( = 0.78 to = 0.85). These developmental trajectories were similar for all children regardless of their baseline age. Normative data are given for the total number of correct designs and switching.
Conclusions: Children as of age 4 onwards can perform a DF task. For children as young as 4-8 years old, computing clustering, and switching measures is of limited value to study cognitive processes underlying DF performance, next to the total number of correct designs. There were no sex differences on any of the DF outcomes. Level of parental education (LPE) was positively associated with the total number of correct designs and switching.
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http://dx.doi.org/10.1080/13803395.2024.2359744 | DOI Listing |
Biochem Genet
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Department of Information Security, School of Computer Science and Engineering, Vellore Institute of Technology, Vellore, 632014, Tamil Nadu, India.
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