Highly-integrable analogue reservoir circuits based on a simple cycle architecture.

Sci Rep

Faculty of Information Science and Technology, Hokkaido University, Kita 14, Nishi 9, Kita-ku, Sapporo, Hokkaido, 0600814, Japan.

Published: May 2024

AI Article Synopsis

  • Physical reservoir computing offers a way to speed up AI computations by using physical systems that have nonlinear and fading-memory characteristics.
  • There is a high demand for physical reservoirs that are easy to integrate for edge AI computing, but creating high-performing and highly integrable reservoirs remains tough.
  • This study introduces an analogue circuit reservoir with a simple architecture designed for CMOS chip integration, demonstrating strong prediction performance and memory capacity in tests with both synthetic and real-world data, indicating potential for advanced AI accelerators.

Article Abstract

Physical reservoir computing is a promising solution for accelerating artificial intelligence (AI) computations. Various physical systems that exhibit nonlinear and fading-memory properties have been proposed as physical reservoirs. Highly-integrable physical reservoirs, particularly for edge AI computing, has a strong demand. However, realizing a practical physical reservoir with high performance and integrability remains challenging. Herein, we present an analogue circuit reservoir with a simple cycle architecture suitable for complementary metal-oxide-semiconductor (CMOS) chip integration. In several benchmarks and demonstrations using synthetic and real-world data, our developed hardware prototype and its simulator exhibit a high prediction performance and sufficient memory capacity for practical applications, showing promise for future applications in highly integrated AI accelerators.

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Source
http://www.ncbi.nlm.nih.gov/pmc/articles/PMC11094067PMC
http://dx.doi.org/10.1038/s41598-024-61880-zDOI Listing

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