Sub-5 nm Ultrathin InO Transistors for High-Performance and Low-Power Electronic Applications.

ACS Appl Mater Interfaces

State Key Laboratory of Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871, China.

Published: April 2024

Ultrathin oxide semiconductors are promising candidates for back-end-of-line (BEOL) compatible transistors and monolithic three-dimensional integration. Experimentally, ultrathin indium oxide (InO) field-effect transistors (FETs) with thicknesses down to 0.4 nm exhibit an extremely high drain current (10 μA/μm) and transconductance (4000 μS/μm). Here, we employ ab initio quantum transport simulation to investigate the performance limit of sub-5 nm gate length () ultrathin InO FETs. Based on the International Technology Roadmap for Semiconductors (ITRS) criteria for high-performance (HP) devices, the scaling limit of ultrathin InO FETs can reach 2 nm in terms of on-state current, delay time, and power dissipation. The wide bandgap nature of ultrathin InO (3.0 eV) renders it a suitable candidate for ITRS low-power (LP) electronics with down to 3 nm. Notably, both the HP and LP ultrathin InO FETs exhibit superior energy-delay products as compared to those of other common 2D semiconductors such as monolayer MoS and MoTe. These findings unveil the potential of ultrathin InO in HP and LP nanoelectronic device applications.

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Source
http://dx.doi.org/10.1021/acsami.4c01353DOI Listing

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