AI Article Synopsis
- This study introduces a novel approach for multi-level storage using via RRAM in conjunction with standard FinFET CMOS logic processes.
- It highlights the achievement of multiple resistance states by carefully managing current compliance during the set operations.
- Additionally, the research proposes new setting circuits to enhance stability and manage resistance control amidst process variations, leading to improved performance in multi-level state distributions.
Article Abstract
In this work, multi-level storage in the via RRAM has been first time reported and demonstrated with the standard FinFET CMOS logic process. Multi-level states in via RRAM are achieved by controlling the current compliance during set operations. The new current compliance setting circuits are proposed to ensure stable resistance control when one considers cells under the process variation effect. The improved stability and tightened distributions on its multi-level states on via RRAM have been successfully demonstrated.
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| http://www.ncbi.nlm.nih.gov/pmc/articles/PMC10963676 | PMC |
| http://dx.doi.org/10.1186/s11671-023-03881-x | DOI Listing |
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