A SiC double-trench MOSFET embedded with a lower-barrier diode and an L-shaped gate-source in the gate trench, showing improved reverse conduction and an improved switching performance, was proposed and studied with 2-D simulations. Compared with a double-trench MOSFET (DT-MOS) and a DT-MOS with a channel-MOS diode (DTC-MOS), the proposed MOS showed a lower voltage drop () at = 100 A/cm, which can prevent bipolar degradation at the same blocking voltage (BV) and decrease the maximum oxide electric field (). Additionally, the gate-drain capacitance () and gate-drain charge () of the proposed MOSFET decreased significantly because the source extended to the bottom of the gate, and the overlap between the gate electrode and drain electrode decreased. Although the proposed MOS had a greater than the DT-MOS and DTC-MOS, it had a lower switching loss and greater advantages for high-frequency applications.
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http://www.ncbi.nlm.nih.gov/pmc/articles/PMC10893430 | PMC |
http://dx.doi.org/10.3390/mi15020254 | DOI Listing |
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