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A Novel Super-Junction DT-MOS with Floating p Regions to Improve Short-Circuit Ruggedness. | LitMetric

A Novel Super-Junction DT-MOS with Floating p Regions to Improve Short-Circuit Ruggedness.

Micromachines (Basel)

School of Electrical Engineering, Southwest Jiaotong University, Chengdu 611756, China.

Published: October 2023

A novel super-junction (SJ) double-trench metal oxide semiconductor field effect transistor (DT-MOS) is proposed and studied using Synopsys Sentaurus TCAD in this article. The simulation results show that the proposed MOSFET has good static performance and a longer short-circuit withstand time (). The super-junction structure enables the device to possess an excellent compromise of breakdown voltage () and specific on-resistance (). Under short-circuit conditions, the depletion of p-pillar, p-shield, and floating p regions can effectively reduce saturation current and improve short-circuit capability. The proposed device has minimum gate-drain charge () and gate-drain capacitance () compared with other devices. Moreover, the formation of floating p regions will not lead to an increase in process complexity. Therefore, the proposed MOSFET can maintain good dynamic and static performance and short-circuit ability together without increasing the difficulty of the process.

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Source
http://www.ncbi.nlm.nih.gov/pmc/articles/PMC10609025PMC
http://dx.doi.org/10.3390/mi14101962DOI Listing

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