As the core of Internet of Things (IoT), embedded processors are being used more and more extensive. However, embedded processors face various hardware security issues such as hardware trojans (HT) and code tamper attacks. In this paper, a cycle-level recovery method for embedded processor against HT tamper is proposed, which builds two hardware-implementation units, a General-Purpose Register (GPRs) backup unit and a PC rollback unit. Once a HT tamper is detected, the two units will carry out fast recovery through rolling back to the exact PC address corresponding to the wrong instruction and resuming the instruction execution. An open RISC-V core of PULPino is adopted for recovery mechanism verification, the experimental results and hardware costs show that the proposed method could guarantee the processor restore from abnormal state in real time with a reasonable hardware overhead.
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http://dx.doi.org/10.1016/j.heliyon.2023.e17085 | DOI Listing |
Heliyon
June 2023
Research Institute of Electronic Science and Technology, University of Electronic Science and Technology of China, No. 2006, Xi Yuan Ave., West High-Tech Zone, Chengdu, 611731, Sichuan, China.
As the core of Internet of Things (IoT), embedded processors are being used more and more extensive. However, embedded processors face various hardware security issues such as hardware trojans (HT) and code tamper attacks. In this paper, a cycle-level recovery method for embedded processor against HT tamper is proposed, which builds two hardware-implementation units, a General-Purpose Register (GPRs) backup unit and a PC rollback unit.
View Article and Find Full Text PDFHum Reprod Open
February 2018
Reproductive Medicine Service, Institut Universitari Dexeus, Gran Via de Carles III, 71-75, Barcelona 08022, Spain.
Study Question: What is the impact on live birth rates (LBR) when a donor IUI (dIUI) cycle is performed with an insemination volume of 0.5 mL versus the usual 0.2 mL?
Summary Answer: LBR after a dIUI cycle is no different when performed with 0.
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