As the feature size of integrated circuits has been scaled down to 10 nm, the rapid increase in the electrical resistance of copper (Cu) metallization has become a critical issue. To alleviate the resistance increases of Cu lines, co-sputtered CoW and CoB alloying metals were investigated as conductors and barriers in this study. Annealing CoM (M = W or B)/SiO/-Si structures reduced the resistivity of CoM alloys, removed sputtering-deposition-induced damage, and promoted adhesion. Additionally, both annealed CoW/SiO or CoB/SiO structures displayed a negligible V shift from capacitance-voltage measurements under electrical stress, revealing an effective barrier capacity, which is attributed to the formation of MO layers at the CoM/SiO interface. Based on the thermodynamics, the BO layer tends to form more easily than the WO layer. Hence, the annealed CoB/SiO/-Si MIS capacitor had a higher capacitance and a larger breakdown strength did than the annealed CoW/SiO/-Si MIS capacitor.
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http://www.ncbi.nlm.nih.gov/pmc/articles/PMC9968080 | PMC |
http://dx.doi.org/10.3390/ma16041452 | DOI Listing |
Materials (Basel)
February 2023
Department of Materials Science and Engineering, National Formosa University, Huwei, Yunlin 63201, Taiwan.
As the feature size of integrated circuits has been scaled down to 10 nm, the rapid increase in the electrical resistance of copper (Cu) metallization has become a critical issue. To alleviate the resistance increases of Cu lines, co-sputtered CoW and CoB alloying metals were investigated as conductors and barriers in this study. Annealing CoM (M = W or B)/SiO/-Si structures reduced the resistivity of CoM alloys, removed sputtering-deposition-induced damage, and promoted adhesion.
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