This paper presents a fully integrated RF energy harvester (EH) with 30% end-to-end power harvesting efficiency (PHE) and supports high output voltage operation, up to 9.3V, with a 1.07 GHz input and under the electrode model for neural applications. The EH is composed of a novel 10-stage self-biased gate (SBG) rectifier with an on-chip matching network. The SBG topology elevates the gate-bias of transistors in a non-linear manner to enable higher conductivity. The design also achieves >20% PHE range of 12-dB. The design was fabricated in 65 nm CMOS technology and occupies an area of 0.0732-mm with on-chip matching network. In addition to standalone EH characterization measurement results, animal tissue stimulation test was performed to evaluate its performance in a realistic neural implant application.
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http://www.ncbi.nlm.nih.gov/pmc/articles/PMC9718487 | PMC |
http://dx.doi.org/10.1109/jssc.2022.3180633 | DOI Listing |
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