Neuromorphic hardware, the new generation of non-von Neumann computing system, implements spiking neurons and synapses to spiking neural network (SNN)-based applications. The energy-efficient property makes the neuromorphic hardware suitable for power-constrained environments where sensors and edge nodes of the internet of things (IoT) work. The mapping of SNNs onto neuromorphic hardware is challenging because a non-optimized mapping may result in a high network-on-chip (NoC) latency and energy consumption. In this paper, we propose NeuMap, a simple and fast toolchain, to map SNNs onto the multicore neuromorphic hardware. NeuMap first obtains the communication patterns of an SNN by calculation that simplifies the mapping process. Then, NeuMap exploits localized connections, divides the adjacent layers into a sub-network, and partitions each sub-network into multiple clusters while meeting the hardware resource constraints. Finally, we employ a meta-heuristics algorithm to search for the best cluster-to-core mapping scheme in the reduced searching space. We conduct experiments using six realistic SNN-based applications to evaluate NeuMap and two prior works (SpiNeMap and SNEAP). The experimental results show that, compared to SpiNeMap and SNEAP, NeuMap reduces the average energy consumption by 84% and 17% and has 55% and 12% lower spike latency, respectively.
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http://dx.doi.org/10.3390/s22197248 | DOI Listing |
Phys Rev Lett
December 2024
University of Strathclyde, Institute of Photonics, SUPA Dept of Physics, Glasgow, United Kingdom.
We report a spiking flip-flop memory mechanism that allows controllably switching between neural-like excitable spike-firing and quiescent dynamics in a resonant tunneling diode (RTD) neuron under low-amplitude (<150 mV pulses) and high-speed (ns rate) inputs pulses. We also show that the timing of the set-reset input pulses is critical to elicit switching responses between spiking and quiescent regimes in the system. The demonstrated flip-flop spiking memory, in which spiking regimes can be controllably excited, stored, and inhibited in RTD neurons via specific low-amplitude, high-speed signals (delivered at proper time instants) offers high promise for RTD-based spiking neural networks, with the potential to be extended further to optoelectronic implementations where RTD neurons and RTD memory elements are deployed alongside for fast and efficient photonic-electronic neuromorphic computing and artificial intelligence hardware.
View Article and Find Full Text PDFRecent Pat Nanotechnol
January 2025
Bernoulli Institute for Mathematics, Computer Science and Artificial Intelligence, University of Groningen, Nijenborgh 9, 9747 AG Groningen, The Netherlands.
The increase in computational power demand led by the development of Artificial Intelligence is rapidly becoming unsustainable. New paradigms of computation, which potentially differ from digital computation, together with novel hardware architecture and devices, are anticipated to reduce the exorbitant energy demand for data-processing tasks. Memristive systems with resistive switching behavior are under intense research, given their prominent role in the fabrication of memory devices that promise the desired hardware revolution in our intensive data-driven era.
View Article and Find Full Text PDFNat Commun
January 2025
School of Future Technology, University of Chinese Academy of Sciences, 100190, Beijing, PR China.
In bioneuronal systems, the synergistic interaction between mechanosensitive piezo channels and neuronal synapses can convert and transmit pressure signals into complex temporal plastic pulses with excitatory and inhibitory features. However, existing artificial tactile neuromorphic systems struggle to replicate the elaborate temporal plasticity observed between excitatory and inhibitory features in biological systems, which is critical for the biomimetic processing and memorizing of tactile information. Here we demonstrate a mechano-gated iontronic piezomemristor with programmable temporal-tactile plasticity.
View Article and Find Full Text PDFNeuromorphic computing is a brain-inspired approach to hardware and algorithm design that efficiently realizes artificial neural networks. Neuromorphic designers apply the principles of biointelligence discovered by neuroscientists to design efficient computational systems, often for applications with size, weight and power constraints. With this research field at a critical juncture, it is crucial to chart the course for the development of future large-scale neuromorphic systems.
View Article and Find Full Text PDFNat Commun
January 2025
Key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics, Chinese Academy of Sciences, 100029, Beijing, China.
Visual sensors, including 3D light detection and ranging, neuromorphic dynamic vision sensor, and conventional frame cameras, are increasingly integrated into edge-side intelligent machines. However, their data are heterogeneous, causing complexity in system development. Moreover, conventional digital hardware is constrained by von Neumann bottleneck and the physical limit of transistor scaling.
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