Vision processing for control of agile autonomous robots requires low-latency computation, within a limited power and space budget. This is challenging for conventional computing hardware. Parallel processor arrays (PPAs) are a new class of vision sensor devices that exploit advances in semiconductor technology, embedding a processor within each pixel of the image sensor array. Sensed pixel data are processed on the focal plane, and only a small amount of relevant information is transmitted out of the vision sensor. This tight integration of sensing, processing, and memory within a massively parallel computing architecture leads to an interesting trade-off between high performance, low latency, low power, low cost, and versatility in a machine vision system. Here, we review the history of image sensing and processing hardware from the perspective of in-pixel computing and outline the key features of a state-of-the-art smart camera system based on a PPA device, through the description of the SCAMP-5 system. We describe several robotic applications for agile ground and aerial vehicles, demonstrating PPA sensing functionalities including high-speed odometry, target tracking, obstacle detection, and avoidance. In the conclusions, we provide some insight and perspective on the future development of PPA devices, including their application and benefits within agile, robust, adaptable, and lightweight robotics.
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Biomed Eng Lett
January 2025
School of Chemistry and Chemical Engineering, Tianjin University of Technology, Tianjin, 300384 People's Republic of China.
Brain-computer interface (BCI) has been widely used in human-computer interaction. The introduction of artificial intelligence has further improved the performance of BCI system. In recent years, the development of BCI has gradually shifted from personal computers to embedded devices, which boasts lower power consumption and smaller size, but at the cost of limited device resources and computing speed, thus can hardly improve the support of complex algorithms.
View Article and Find Full Text PDFSensors (Basel)
December 2024
Department of Mechanical and Aerospace Engineering, Missouri University of Science and Technology, Rolla, MO 65409, USA.
The combination of distributed digital factories (DFs) with sustainable practices has been proposed as a revolutionary technique in modern manufacturing. This review paper explores the convergence of DF with innovative sensor technology, concentrating on the role of Field Programmable Gate Arrays (FPGAs) in promoting this paradigm. A DF is defined as an integrated framework where digital twins (DTs), sensors, laser additive manufacturing (laser-AM), and subtractive manufacturing (SM) work in synchronization.
View Article and Find Full Text PDFJ Acoust Soc Am
December 2024
Key Laboratory for Polar Acoustics and Application of Ministry of Education (Harbin Engineering University), Ministry of Education, Harbin, 150001, China.
Matched-field processing (MFP) achieves underwater source localization by measuring the correlation between the array and replica signals, with traditional MFP being equivalent to estimating the Euclidean distance between the data cross-spectral density matrix (CSDM) and replica matrices. However, in practical applications, random inhomogeneities in the marine environment and inaccurate estimation of CSDM reduce MFP performance. The traditional minimum variance matched-field processor with environmental perturbation constraints perturbs a priori environment parameters to obtain linear constraints and yields the optimal weight vectors as the replica vectors.
View Article and Find Full Text PDFAdv Mater
December 2024
School of Electrical Engineering, Graduate School of Semiconductor Technology, Korea Advanced Institute of Science and Technology (KAIST), 291 Daehak-ro, Yuseong-gu, Daejeon, 34141, Republic of Korea.
Memristors based on 2D materials (2DMs) have attracted considerable research interest due to their excellent switching performance. Former synthesis methods for 2DMs aimed to synthesize 2DMs with a large grain size. However, these methods cause a stochastic distribution of defects in high-density memristor arrays, resulting in device nonuniformity.
View Article and Find Full Text PDFNat Commun
November 2024
Hybrid Quantum Circuit Laboratory, Institute of Physics and Center for Quantum Science and Engineering, École Polytéchnique Fédérale de Lausanne (EPFL), Lausanne, 1015, Switzerland.
Semiconductor quantum dots (QDs) in planar germanium (Ge) heterostructures have emerged as front-runners for future hole-based quantum processors. Here, we present strong coupling between a hole charge qubit, defined in a double quantum dot (DQD) in planar Ge, and microwave photons in a high-impedance (Z = 1.3 kΩ) resonator based on an array of superconducting quantum interference devices (SQUIDs).
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