The amorphous indium gallium oxide thin film transistor was fabricated using a cosputtering method. Two samples with different gate dielectric layers were used as follows: sample A with a SiO dielectric layer; and sample B with an AlO dielectric layer. The influence of the gate dielectrics on the electric and photo performance has been investigated. Atomic layer deposition deposited the dense film with low interface trapping density and effectively increased drain current. Therefore, sample B exhibited optimal parameters, with an / ratio of 7.39 × 10, the subthreshold swing of 0.096 V dec, and of 5.36 cm V s. For ultraviolet (UV) detection, the UV-to-visible rejection ratio of the device was 3 × 10, and the photoresponsivity was 0.38 A W at the of -5 V.
Download full-text PDF |
Source |
|---|---|
| http://www.ncbi.nlm.nih.gov/pmc/articles/PMC9050226 | PMC |
| http://dx.doi.org/10.1039/d0ra00123f | DOI Listing |
Publication Analysis
Top Keywords
Similar Publications
Highly Strained Polymeric Monolayer Stacked for Wafer-Scale and Transferable Nanodielectrics.
ACS Nano
December 2024
Key Laboratory of Mesoscopic Chemistry of MOE, School of Chemistry and Chemical Engineering, Nanjing University, Nanjing, Jiangsu, 210023, China.
As the keystones of molecular electronics, high-quality nanodielectric layers are challenging to assemble due to the strictest criteria for their reliability and uniformity over a large area. Here, we report a strained poly(4-vinylphenol) monolayer, ready to be stacked to form defect-free wafer-scale nanodielectrics. The thickness of the nanodielectrics can be precisely adjusted in integral multiples of the 1.
View Article and Find Full Text PDFNew Label-Free DNA Nanosensor Based on Top-Gated Metal-Ferroelectric-Metal Graphene Nanoribbon on Insulator Field-Effect Transistor: A Quantum Simulation Study.
Nanomaterials (Basel)
December 2024
High-Power Converter Systems (HLU), Technical University of Munich (TUM), 80333 Munich, Germany.
In this paper, a new label-free DNA nanosensor based on a top-gated (TG) metal-ferroelectric-metal (MFM) graphene nanoribbon field-effect transistor (TG-MFM GNRFET) is proposed through a simulation approach. The DNA sensing principle is founded on the dielectric modulation concept. The computational method employed to evaluate the proposed nanobiosensor relies on the coupled solutions of a rigorous quantum simulation with the Landau-Khalatnikov equation, considering ballistic transport conditions.
View Article and Find Full Text PDFCompetition between Bipolar Conduction Modes in Extrinsically -Doped MoS: Interaction with Gate Dielectric Matters.
ACS Nano
December 2024
Department of Materials Science and Engineering, Ulsan National Institute of Science and Technology, Ulsan 44919, Republic of Korea.
With reduced dimensionality and a high surface area-to-volume ratio, two-dimensional (2D) semiconductors exhibit intriguing electronic properties that are exceptionally sensitive to surrounding environments, including directly interfacing gate dielectrics. These influences are tightly correlated to their inherent behavior, making it critical to examine when extrinsic charge carriers are intentionally introduced to the channel for complementary functionality. This study explores the physical origin of the competitive transition between intrinsic and extrinsic charge carrier conduction in extrinsically -doped MoS, highlighting the central role of interactions of the channel with amorphous gate dielectrics.
View Article and Find Full Text PDFA novel Alzheimer detection rapid-testing low-cost technique by a gate engineered gate stack dual-gate FET device.
Talanta
December 2024
Nextgen Adaptive Systems Group, Department of Electrical Engineering, National Institute of Technology Patna, Bihar, India. Electronic address:
This study explores a quick, low-cost method to detect Alzheimer's disease (AD) by evaluating the accomplishment of a Gate-Stack (GS) Field Effect Transistor (FET). We investigate Single-Metal (SM), Dual-Metal (DM), and Tri-Metal Double Gate (DG) configurations, where cavities have been created by etching the oxide layer underneath the gate to immobilize grey matter samples collected through Solid-phase microextraction (SPME). Healthy and AD-affected grey matter have different dielectric characteristics at high frequencies.
View Article and Find Full Text PDFBEOL Three-Dimensional Stackable Oxide Semiconductor CMOS Inverter with a High Voltage Gain of 233 at Cryogenic Temperatures.
Nano Lett
December 2024
Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576.
Targeting high-performance computing at cryogenic temperatures, we report back-end-of-line (BEOL)-compatible p-type Te-TeO field effect transistors (FETs) deposited using a sputtering method that is cost-effective, large-scale manufacturable, and highly controllable. Combined with the indium tin oxide channel n-FETs employing a common gate and HfO gate dielectric, BEOL three-dimensional stackable oxide semiconductor complementary metal oxide semiconductor (CMOS) inverters were further realized, demonstrating excellent threshold voltage matching, with a high voltage gain of 132 with a 2 V supply voltage () at room temperature. At cryogenic temperatures, the CMOS inverter exhibits significantly enhanced performance, achieving a voltage gain of 233 at a of 2 V with a wide noise margin of 86%.
View Article and Find Full Text PDFWant AI Summaries of new PubMed Abstracts delivered to your In-box?
Enter search terms and have AI summaries delivered each week - change queries or unsubscribe any time!