Due to the modern pursuit of the quality of life, science and technology have rapidly developed, resulting in higher requirements for various detection methods based on analytical technology. Herein, the development, fabrication, detection and application of paper-based microfluidic chips (μPAD) are summarized. We aim to provide a comprehensive understanding of paper chips, and then discuss challenges and future prospects in this field.
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http://dx.doi.org/10.1039/d0ra10470a | DOI Listing |
Anal Chim Acta
February 2025
The Key Laboratory of Biomedical Information Engineering of Ministry of Education, School of Life Science and Technology, Xi'an Jiaotong University, No. 28 Xianning West Road, Xi'an, 710049, China. Electronic address:
Background: Plasmonic core-shell nanostructures with embedded internal markers used as Raman probes have attracted great attention in surface-enhanced Raman scattering (SERS) immunoassay for cancer biomarkers due to their excellent uniform enhancement. However, current core-shell nanostructures typically exhibit a spherical shape and are coated with a gold shell, resulting in constrained local field enhancement.
Results: In this work, we prepared a core-shell AuNR@BDT@Ag structure by depositing silver on the surface of Raman reporter-modified gold nanorods (AuNR).
Sensors (Basel)
January 2025
Mechnical and Vehicle Engineering, Hunan University, Changsha 411082, China.
Chip defect detection is a crucial aspect of the semiconductor production industry, given its significant impact on chip performance. This paper proposes a lightweight neural network with dual decoding paths for LED chip segmentation, named LDDP-Net. Within the LDDP-Net framework, the receptive field of the MobileNetv3 backbone is modified to mitigate information loss.
View Article and Find Full Text PDFMicromachines (Basel)
January 2025
State Key Discipline Laboratory of Wide Bandgap Semiconductor Technology, School of Microelectronics, Xidian University, Xi'an 710071, China.
In this paper, a novel p-type junctionless field effect transistor (PJLFET) based on a partially depleted silicon-on-insulator (PD-SOI) is proposed and investigated. The novel PJLFET integrates a buried N+-doped layer under the channel to enable the device to be turned off, leading to a special work mechanism and optimized performance. Simulation results show that the proposed PJLFET demonstrates an I/I ratio of more than seven orders of magnitude, with I reaching up to 2.
View Article and Find Full Text PDFMicromachines (Basel)
January 2025
State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 611731, China.
Current stress sensors for microsystems face integration challenges and complex signal decoding. This paper proposes a real-time uniaxially sensitive stress sensor. It is obtained by simple combinations of bar resistors using their sensitivity differences in different axes.
View Article and Find Full Text PDFMicromachines (Basel)
December 2024
School of Microelectronics, Xidian University, Xi'an 710071, China.
The failure of different chips under working conditions is influenced by various stress states such as different voltages, temperatures, stress durations, and stress variations. Therefore, the failure time has a great degree of dispersion, and similar chips may exhibit different failure mechanisms due to variations in their working environments. This paper proposes three system-on-chip reliability failure prediction unit circuits: the time-dependent dielectric breakdown prediction circuit, the negative bias temperature instability prediction circuit, and the hot carrier injection prediction circuit.
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