The variations in the degradation of electrical characteristics resulting from different device structures for trench-gate SiC metal-oxide-semiconductor field effect transistors (MOSFETs) are investigated in this work. Two types of the most advanced commercial trench products, which are the asymmetric trench SiC MOSFET and the double-trench SiC MOSFET, are chosen as the targeted devices. The discrepant degradation trends caused by the repetitive avalanche stress are monitored. For the double-trench device, the conduction characteristic improves while the gate-drain capacitance (C) increases seriously. It is because positive charges are injected into the bottom gate oxide during the avalanche process, which are driven by the high oxide electronic field (E) and the high impact ionization rate (I.I.) there. Meanwhile, for the asymmetric trench SiC MOSFET, the I-V curve under the high gate bias condition and the C remain relatively stable, while the trench bottom is well protected by the deep P+ well. However, it's threshold voltage (V) decreases more obviously when compared with that of the double-trench device and the inclined channel suffers from more serious stress than the vertical channel. Positive charges are more easily injected into the inclined channel. The phenomena and the corresponding mechanisms are analyzed and proved by experiments and technology computer-aided design (TCAD) simulations.

Download full-text PDF

Source
http://www.ncbi.nlm.nih.gov/pmc/articles/PMC8781827PMC
http://dx.doi.org/10.3390/ma15020457DOI Listing

Publication Analysis

Top Keywords

sic mosfet
12
device structures
8
trench-gate sic
8
avalanche stress
8
asymmetric trench
8
trench sic
8
double-trench device
8
positive charges
8
inclined channel
8
sic
5

Similar Publications

Want AI Summaries of new PubMed Abstracts delivered to your In-box?

Enter search terms and have AI summaries delivered each week - change queries or unsubscribe any time!