Flash memory devices represented a breakthrough in the storage industry since their inception in the mid-1980s, and innovation is still ongoing after more than 35 years [...].
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http://dx.doi.org/10.3390/mi12121566 | DOI Listing |
ACS Appl Mater Interfaces
January 2025
Department of Electronic Engineering, Hanyang University, Seoul 04763, Republic of Korea.
For potential application in advanced memory devices such as dynamic random-access memory (DRAM) or NAND flash, nanolaminated indium oxide (In-O) and gallium oxide (Ga-O) films with five different vertical cation distributions were grown and investigated by using a plasma-enhanced atomic layer deposition (PEALD) process. Specifically, this study provides an in-depth examination of how the control of individual layer thicknesses in the nanolaminated (NL) IGO structure impacts not only the physical and chemical properties of the thin film but also the overall device performance. To eliminate the influence of the cation composition ratio and overall thickness on the IGO thin film, these parameters were held constant across all conditions.
View Article and Find Full Text PDFPhilos Trans A Math Phys Eng Sci
January 2025
Microsystems Group, School of Engineering, Newcastle University, Newcastle upon Tyne NE1 7RU, UK.
The increasing demand for processing large volumes of data for machine learning (ML) models has pushed data bandwidth requirements beyond the capability of traditional von Neumann architecture. In-memory computing (IMC) has recently emerged as a promising solution to address this gap by enabling distributed data storage and processing at the micro-architectural level, significantly reducing both latency and energy. In this article, we present In-Memory comPuting architecture based on Y-FlAsh technology for Coalesced Tsetlin machine inference (IMPACT), underpinned on a cutting-edge memory device, Y-Flash, fabricated on a 180 nm complementary metal oxide semiconductor (CMOS) process.
View Article and Find Full Text PDFMicromachines (Basel)
December 2024
Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, 20133 Milan, Italy.
Through detailed experimental and modeling activities, this paper investigates the origin of the temperature dependence of the Erase operation in 3D nand flash arrays. First of all, experimental data collected down to the cryogenic regime on both charge-trap and floating-gate arrays are provided to demonstrate that the reduction in temperature makes cells harder to Erase irrespective of the nature of their storage layer. This evidence is then attributed to the weakening, with the decrease in temperature, of the gate-induced drain leakage (GIDL) current exploited to set the electrostatic potential of the body of the nand strings during Erase.
View Article and Find Full Text PDFMicromachines (Basel)
November 2024
School of Computer and Artificial Intelligence, Wuhan University of Technology, Wuhan 430070, China.
With vertical stacking, 3D NAND's flash memory can achieve continuous capacity growth. However, the endurance variation between the stacked layers becomes more and more significant due to process variation, which will lead to the underutilization of many pages and seriously affect the lifetime of 3D NAND's flash memory. We investigated the endurance variation characteristics between layers and divided the stacked layers into the top, middle, and bottom layers according to the endurance characteristics.
View Article and Find Full Text PDFJ Magn Reson
January 2025
Bridge12 Magnetic Resonance, 11 Michigan Drive, Natick, MA 01760, USA. Electronic address:
We present a fully automated cryogenic sample insertion and ejection system for use with low-temperature EPR probes. We show how the system can be implemented on a conventional EPR spectrometer and that ejection and insertion is reliably possible at temperatures down to 10 K. Furthermore, we investigate the glass properties of a 0.
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