The phase change memory (PCM) is one of the key enabling memory technologies for next-generation non-volatile memory device applications due to its high writing speed, excellent endurance, long retention time, and good scalability. However, the high power consumption of PCM devices caused by the high switching current from a high resistive state to a low resistive state is a critical obstacle to be resolved before widespread commercialization can be realized. Here, a useful approach to reduce the writing current of PCM, which depends strongly on the contact area between the heater electrode and active layer, by employing self-assembly process of Si-containing block copolymers (BCPs) is presented. Self-assembled insulative BCP pattern geometries can locally block the current path of the contact between a high resistive film (TiN) and a phase-change material (Ge Sb Te ), resulting in a significant reduction of the writing current. Compared to a conventional PCM cell, the BCP-modified PCM shows excellent switching power reduction up to 1/20 given its use of self-assembled hybrid SiFe O /SiO dot-in-hole nanostructures. This BCP-based bottom-up process can be extended to various applications of other non-volatile memory devices, such as resistive switching memory and magnetic storage devices.
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http://dx.doi.org/10.1002/smll.202105078 | DOI Listing |
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