A significant increase has been observed in the use of Underwater Wireless Sensor Networks (UWSNs) over the last few decades. However, there exist several associated challenges with UWSNs, mainly due to the nodes' mobility, increased propagation delay, limited bandwidth, packet duplication, void holes, and Doppler/multi-path effects. To address these challenges, we propose a protocol named "An Efficient Routing Protocol based on Master-Slave Architecture for Underwater Wireless Sensor Network (ERPMSA-UWSN)" that significantly contributes to optimizing energy consumption and data packet's long-term survival. We adopt an innovative approach based on the master-slave architecture, which results in limiting the forwarders of the data packet by restricting the transmission through master nodes only. In this protocol, we suppress nodes from data packet reception except the master nodes. We perform extensive simulation and demonstrate that our proposed protocol is delay-tolerant and energy-efficient. We achieve an improvement of 13% on energy tax and 4.8% on Packet Delivery Ratio (PDR), over the state-of-the-art protocol.
Download full-text PDF |
Source |
|---|---|
| http://www.ncbi.nlm.nih.gov/pmc/articles/PMC8123114 | PMC |
| http://dx.doi.org/10.3390/s21093000 | DOI Listing |
Publication Analysis
Top Keywords
Similar Publications
Cloud-fog architecture-based control of smart island microgrid in master-slave organization using disturbance observer-based hybrid backstepping sliding mode controller.
Heliyon
September 2024
Department of Electrical and Electronics Engineering, Shiraz University of Technology, Shiraz, Iran.
Distributed control is an effective method to coordinate the microgrid with various components, and also in a smart microgrid, communication graph layouts are essential since changing the topology unexpectedly could disrupt the operation of the distributed controllers, and also an imbalance may occur between the production and load. Hence, reducing the exchanged data between units and system operator is essential in order to reduce the transmitted data volume and computational burden. For this purpose, an islanded microgrid with multiple agents which is using cloud-fog computing is proposed here, in order to reduce the computing burden on the central control unit as well as reducing data exchange among units.
View Article and Find Full Text PDFImplementation and optimization of SpMV algorithm based on SW26010P many-core processor and stored in BCSR format.
Sci Rep
July 2024
College of Information Science and Engineering, Ocean University of China, Qingdao, China.
The irregular distribution of non-zero elements of large-scale sparse matrix leads to low data access efficiency caused by the unique architecture of the Sunway many-core processor, which brings great challenges to the efficient implementation of sparse matrix-vector multiplication (SpMV) computing by SW26010P many-core processor. To address this problem, a study of SpMV optimization strategies is carried out based on the SW26010P many-core processor. Firstly, we design a memorized data storage transformation strategy to transform the matrix in CSR storage format into BCSR (Block Compressed Sparse Row) storage.
View Article and Find Full Text PDFLow-power and area-efficient memristor based non-volatile D latch and flip-flop: Design and analysis.
PLoS One
March 2024
School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamilnadu, India.
In recent years, non-volatile memory elements have become highly appealing for memory applications to implement a new class of storage memory that could replace flash memories in sequential logic applications, with features such as compactness, low power, fast processing speed, high endurance, and retention. The memristor is one such non-volatile element that fits the fundamental blocks of sequential logic circuits, the latch and flip-flop; hence, in this article, a non-volatile latch architecture using memristor ratioed logic (MRL) inverter and CMOS components is focused, with an additional memristor as a memory element. A Verilog-A model was used to create the memristor element.
View Article and Find Full Text PDFA 3D-Printed Micro-Optofluidic Chamber for Fluid Characterization and Microparticle Velocity Detection.
Micromachines (Basel)
November 2023
Department of Electrical Electronic and Computer Science Engineering, University of Catania, Via Santa Sofia 64, 95125 Catania, Italy.
This work proposes a multi-objective polydimethylsiloxane (PDMS) micro-optofluidic (MoF) device suitably designed and manufactured through a 3D-printed-based master-slave approach. It exploits optical detection techniques to characterize immiscible fluids or microparticles in suspension inside a compartment specifically designed at the core of the device referred to as the . In addition, we show our novel, fast, and cost-effective methodology, dual-slit particle signal velocimetry (DPSV), for fluids and microparticle velocity detection.
View Article and Find Full Text PDFMaster-Slave Deep Architecture for Top- K Multiarmed Bandits With Nonlinear Bandit Feedback and Diversity Constraints.
IEEE Trans Neural Netw Learn Syst
November 2023
We propose a novel master-slave architecture to solve the top- K combinatorial multiarmed bandits (CMABs) problem with nonlinear bandit feedback and diversity constraints, which, to the best of our knowledge, is the first combinatorial bandits setting considering diversity constraints under bandit feedback. Specifically, to efficiently explore the combinatorial and constrained action space, we introduce six slave models with distinguished merits to generate diversified samples well balancing rewards and constraints as well as efficiency. Moreover, we propose teacher learning-based optimization and the policy cotraining technique to boost the performance of the multiple slave models.
View Article and Find Full Text PDFWant AI Summaries of new PubMed Abstracts delivered to your In-box?
Enter search terms and have AI summaries delivered each week - change queries or unsubscribe any time!