High-Performance Top-Gate Thin-Film Transistor with an Ultra-Thin Channel Layer.

Nanomaterials (Basel)

Rzhanov Institute of Semiconductor Physics, Siberian Branch, Russian Academy of Sciences, 630090 Novosibirsk, Russia.

Published: October 2020

Metal-oxide thin-film transistors (TFTs) have been implanted for a display panel, but further mobility improvement is required for future applications. In this study, excellent performance was observed for top-gate coplanar binary SnO TFTs, with a high field-effect mobility () of 136 cm/Vs, a large on-current/off-current (I/I) of 1.5 × 10, and steep subthreshold slopes of 108 mV/dec. Here, represents the maximum among the top-gate TFTs made on an amorphous SiO substrate, with a maximum process temperature of ≤ 400 °C. In contrast to a bottom-gate device, a top-gate device is the standard structure for monolithic integrated circuits (ICs). Such a superb device integrity was achieved by using an ultra-thin SnO channel layer of 4.5 nm and an HfO gate dielectric with a 3 nm SiO interfacial layer between the SnO and HfO. The inserted SiO layer is crucial for decreasing the charged defect scattering in the HfO and HfO/SnO interfaces to increase the mobility. Such high , large I, and low I top-gate SnO devices with a coplanar structure are important for display, dynamic random-access memory, and monolithic three-dimensional ICs.

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Source
http://www.ncbi.nlm.nih.gov/pmc/articles/PMC7694091PMC
http://dx.doi.org/10.3390/nano10112145DOI Listing

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