Fan-out wafer-level packaging (FOWLP) is an interesting platform for Microelectromechanical systems (MEMS) sensor packaging. Employing FOWLP for MEMS sensor packaging has some unique challenges, while some originate merely from the fabrication of redistribution layers (RDL). For instance, it is crucial to protect the delicate structures and fragile membranes during RDL formation. Thus, additive manufacturing (AM) for RDL formation seems to be an auspicious approach, as those challenges are conquered by principle. In this study, by exploiting the benefits of AM, RDLs for fan-out packaging of capacitive micromachined ultrasound transducers (CMUT) were realized via drop-on-demand inkjet printing technology. The long-term reliability of the printed tracks was assessed via temperature cycling tests. The effects of multilayering and implementation of an insulating ramp on the reliability of the conductive tracks were identified. Packaging-induced stresses on CMUT dies were further investigated via laser-Doppler velocimetry (LDV) measurements and the corresponding resonance frequency shift. Conclusively, the bottlenecks of the inkjet-printed RDLs for FOWLP were discussed in detail.
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http://dx.doi.org/10.3390/mi11060564 | DOI Listing |
Micromachines (Basel)
October 2024
School of Mechatronical Engineering, Beijing Institute of Technology, Beijing 100081, China.
Micromachines (Basel)
June 2023
Yangzhou Yangjie Electronic Technology Co., Ltd., Yangzhou 225008, China.
To meet the demands for miniaturization and multi-functional and high-performance electronics applications, the semiconductor industry has shifted its packaging approach to multi-chip vertical stacking. Among the advanced packaging technologies for high-density interconnects, the most persistent factor affecting their reliability is the electromigration (EM) problem on the micro-bump. The operating temperature and the operating current density are the main factors affecting the EM phenomenon.
View Article and Find Full Text PDFFundam Res
November 2024
Georgia Institute of Technology, North Avenue, Atlanta, GA 30332, United States.
In the post-Moore era, advanced packaging is becoming more critical to meet the everlasting demands of electronic products with smaller size, more powerful performance and lower cost. In this paper, developments in advanced packaging have been discussed, such as 3D IC packaging, fan-out packaging, and chiplet packaging. Insights on the major advantages and challenges have also been briefly introduced.
View Article and Find Full Text PDFFundam Res
November 2024
School of Microelectronics, University of Science and Technology of China, Hefei 230026, China.
A transformer-in-package (TiP) isolated direct current-direct current (DC-DC) converter using glass-based fan-out wafer-level packaging (FOWLP) is proposed. By using 3-layer redistribution layers (RDLs), both the transformer and interconnections are built without an additional transformer chip, and the converter only has 2 dies: a transmitter (TX) chip and a receiver (RX) chip. The proposed solution results in a significant reduction in the cost and makes major improvements in the form factor and power density.
View Article and Find Full Text PDFMaterials (Basel)
April 2023
Department of Mechanical and Electromechanical Engineering, Engineering Technology Research & Promotion Center, National Sun Yat-sen University, Kaohsiung 804, Taiwan.
This study investigated the impact of material properties of epoxy molding compounds on wafer warpage in fan-out wafer-level packaging. As there is currently a lack of comprehensive discussion on the various material property parameters of EMC materials, it is essential to identify the critical influencing factors and quantify the effects of each parameter on wafer warpage. The material properties include Young's modulus of the epoxy molding compound before and after the glass transition temperature (Tg) range of 25-35 °C (E) and 235-260 °C (E), coefficient of thermal expansion (α1, α2), and the temperature change (∆T) between E and E.
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