We show that the non-linear positive capacitance (PC) of ferroelectrics (FE) can explain the steep subthreshold-slope (SS) observed in FE based MOSFETs and often attributed to the existence of a negative capacitance in FE capacitors. Physically attainable and unattainable regions of the S-shape curve used in the negative capacitance theory are investigated by self-consistently solving Landau-Khalatnikov and Maxwell equations and by experimental validation. Finally, the conditions for attaining a steep SS in FE based MOSFETs assuming only positive capacitances are discussed.
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http://dx.doi.org/10.1038/s41598-019-51237-2 | DOI Listing |
Langmuir
January 2025
Department of Materials Engineering, School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan.
A solution-gated indium-tin-oxide (ITO)-based field effect transistor (FET) without interfaces among the source, channel, and drain electrodes, which is called the one-piece ITO-FET, can be simply fabricated from a single sheet of ITO by etching the channel region. The direct contact of the ITO channel surface with a sample solution contributes to a steep subthreshold slope and a high on/off ratio. In this study, we have examined the effects of oxygen vacancies and hydroxy groups at the ITO channel surface on the electrical characteristics of the one-piece ITO-FET.
View Article and Find Full Text PDFACS Appl Mater Interfaces
December 2024
Centre for Nano Science and Engineering, Indian Institute of Science, Bengaluru 560012, India.
Adv Mater
June 2024
SKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon, 16419, South Korea.
Herein, a high-quality gate stack (native HfO formed on 2D HfSe) fabricated via plasma oxidation is reported, realizing an atomically sharp interface with a suppressed interface trap density (D ≈ 5 × 10 cm eV). The chemically converted HfO exhibits dielectric constant, κ ≈ 23, resulting in low gate leakage current (≈10 A cm) at equivalent oxide thickness ≈0.5 nm.
View Article and Find Full Text PDFDiscov Nano
September 2023
Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung, 80424, Taiwan, R.O.C.
In this paper, we present a new novel simple iTFET with overlapping gate on source-contact (SGO), Drain Schottky Contact, and intrinsic SiGe pocket (Pocket-SGO iTFET). The aim is to achieve steep subthreshold swing (S.S) and high I current.
View Article and Find Full Text PDFACS Nano
April 2023
School of Electronic Engineering, Soongsil University, Seoul 06938, South Korea.
Significant effort for demonstrating a gallium nitride (GaN)-based ferroelectric metal-oxide-semiconductor (MOS)-high-electron-mobility transistor (HEMT) for reconfigurable operation via simple pulse operation has been hindered by the lack of suitable materials, gate structures, and intrinsic depolarization effects. In this study, we have demonstrated artificial synapses using a GaN-based MOS-HEMT integrated with an α-InSe ferroelectric semiconductor. The van der Waals heterostructure of GaN/α-InSe provides a potential to achieve high-frequency operation driven by a ferroelectrically coupled two-dimensional electron gas (2DEG).
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