A high-speed data acquisition system based on FPGA for tokamak.

The Experimental Advanced Superconducting Tokamak (EAST) device aims to achieve a steady-state and long-pulse discharge over 1000 s. An embedded high-speed data acquisition system based on a field-programmable gate array (FPGA) for EAST is designed in this study. A cyclone FPGA is used as the master chip, and a TI's analog-to-digital conversion (ADC) chip is used to complete ADC. One acquisition system board consists of four ADC chips. The acquired data are compressed and stored into a disk array through a Peripheral Component Interconnect (PCI) Express interface and then uploaded to the data server. One board can collect the signals of eight channels synchronously. A number of such boards can be used to collect additional channel signals. Experimental results show that the system can reach 80 MSps and the sampling precision can reach 12 bits with 1250 s continuous sampling. The system integrates signal conditioning, data acquisition, and data processing into a single board and provides an architecture with high integration and portability levels.