Solution-processable 2D semiconductors for high-performance large-area electronics.

Two-dimensional (2D) materials, consisting of atomically thin crystal layers bound by the van der Waals force, have attracted much interest because of their potential in diverse technologies, including electronics, optoelectronics and catalysis. In particular, solution-processable 2D semiconductor (such as MoS) nanosheets are attractive building blocks for large-area thin-film electronics. In contrast to conventional zero- and one-dimensional nanostructures (quantum dots and nanowires, respectively), which are typically plagued by surface dangling bonds and associated trapping states, 2D nanosheets have dangling-bond-free surfaces. Thin films created by stacking multiple nanosheets have atomically clean van der Waals interfaces and thus promise excellent charge transport. However, preparing high-quality solution-processable 2D semiconductor nanosheets remains a challenge. For example, MoS nanosheets and thin films produced using lithium intercalation and exfoliation are plagued by the presence of the metallic 1T phase and poor electrical performance (mobilities of about 0.3 square centimetres per volt per second and on/off ratios of less than 10), and materials produced by liquid exfoliation exhibit an intrinsically broad thickness distribution, which leads to poor film quality and unsatisfactory thin-film electrical performance (mobilities of about 0.4 square centimetres per volt per second and on/off ratios of about 100). Here we report a general approach to preparing highly uniform, solution-processable, phase-pure semiconducting nanosheets, which involves the electrochemical intercalation of quaternary ammonium molecules (such as tetraheptylammonium bromide) into 2D crystals, followed by a mild sonication and exfoliation process. By precisely controlling the intercalation chemistry, we obtained phase-pure, semiconducting 2H-MoS nanosheets with a narrow thickness distribution. These nanosheets were then further processed into high-performance thin-film transistors, with room-temperature mobilities of about 10 square centimetres per volt per second and on/off ratios of 10 that greatly exceed those obtained for previous solution-processed MoS thin-film transistors. The scalable fabrication of large-area arrays of thin-film transistors enabled the construction of functional logic gates and computational circuits, including an inverter, NAND, NOR, AND and XOR gates, and a logic half-adder. We also applied our approach to other 2D materials, including WSe, BiSe, NbSe, InSe, SbTe and black phosphorus, demonstrating its potential for generating versatile solution-processable 2D materials.