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Presetting conductive pathway induced the switching uniformity evolution of a-SiN:H resistive switching memory. | LitMetric

Presetting conductive pathway induced the switching uniformity evolution of a-SiN:H resistive switching memory.

Nanotechnology

School of Electronic Science and Engineering, Nanjing University, Nanjing, 210093, People's Republic of China. Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing, 210093, People's Republic of China. Jiangsu Provincial Key Laboratory of Photonic and Electronic Materials Sciences and Technology, Nanjing University, Nanjing, 210093, People's Republic of China.

Published: October 2018

Si-based resistive random access memory (RRAM) devices at the nanoscale with high uniformity have great potential applications in the future. We demonstrate that the uniformity evolution of the a-SiN:H RRAM at the low resistance state (LRS) and the high resistance state (HRS) can be clearly monitored by presetting a Si dangling bond (Si-DB) conductive pathway through thermal energy. It is found that the increased magnitude of uniformity for the LRS and the HRS are determined by the number of preset Si-DBs, which can be controlled by tuning thermal energy. As for LRS, the Si-DBs produced under the electric field along with the preset Si-DB conductive pathways form the main conductive pathway. Theoretical calculation of current-voltage (I-V) curves indicates that the Si-DB conductive pathways obey the trap-assisted tunneling model. In the HRS, the preset Si-DBs induced by thermal energy are the unique source of the conductive pathway. The transmission mechanism involves a trap-to-trap process by the hopping of electrons under a low electric field, Poole-Frenkel emission in the main region under the medium electric field and Fowler-Nordheim tunneling under the high electric field. Our discovery of the uniformity evolution for a-SiN:H RRAM device through presetting the Si-DB conductive pathway provides new insight into the resistive switching mechanism of next generation Si-based RRAM devices.

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Source
http://dx.doi.org/10.1088/1361-6528/aad35dDOI Listing

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