Effect of Dielectric Interface on the Performance of MoS Transistors.

ACS Appl Mater Interfaces

Wuhan National High Magnetic Field Center and School of Electrical and Electronic Engineering and ‡Wuhan National High Magnetic Field Center and School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, China.

Published: December 2017

Because of their wide bandgap and ultrathin body properties, two-dimensional materials are currently being pursued for next-generation electronic and optoelectronic applications. Although there have been increasing numbers of studies on improving the performance of MoS field-effect transistors (FETs) using various methods, the dielectric interface, which plays a decisive role in determining the mobility, interface traps, and thermal transport of MoS FETs, has not been well explored and understood. In this article, we present a comprehensive experimental study on the effect of high-k dielectrics on the performance of few-layer MoS FETs from 300 to 4.3 K. Results show that AlO/HfO could boost the mobility and drain current. Meanwhile, MoS transistors with AlO/HfO demonstrate a 2× reduction in oxide trap density compared to that of the devices with the conventional SiO substrate. Also, we observe a negative differential resistance effect on the device with 1 μm-channel length when using conventional SiO as the gate dielectric due to self-heating, and this is effectively eliminated by using the AlO/HfO gate dielectric. This dielectric engineering provides a highly viable route to realizing high-performance transition metal dichalcogenide-based FETs.

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http://dx.doi.org/10.1021/acsami.7b14031DOI Listing

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