Interfacial, Electrical, and Band Alignment Characteristics of HfO/Ge Stacks with In Situ-Formed SiO Interlayer by Plasma-Enhanced Atomic Layer Deposition.

Nanoscale Res Lett

National Laboratory of Solid State Microstructures and Department of Materials Science and Engineering, College of Engineering and Applied sciences, Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing, 210093, People's Republic of China.

Published: December 2017

In situ-formed SiO was introduced into HfO gate dielectrics on Ge substrate as interlayer by plasma-enhanced atomic layer deposition (PEALD). The interfacial, electrical, and band alignment characteristics of the HfO/SiO high-k gate dielectric stacks on Ge have been well investigated. It has been demonstrated that Si-O-Ge interlayer is formed on Ge surface during the in situ PEALD SiO deposition process. This interlayer shows fantastic thermal stability during annealing without obvious Hf-silicates formation. In addition, it can also suppress the GeO degradation. The electrical measurements show that capacitance equivalent thickness of 1.53 nm and a leakage current density of 2.1 × 10 A/cm at gate bias of V + 1 V was obtained for the annealed sample. The conduction (valence) band offsets at the HfO/SiO/Ge interface with and without PDA are found to be 2.24 (2.69) and 2.48 (2.45) eV, respectively. These results indicate that in situ PEALD SiO may be a promising interfacial control layer for the realization of high-quality Ge-based transistor devices. Moreover, it can be demonstrated that PEALD is a much more powerful technology for ultrathin interfacial control layer deposition than MOCVD.

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Source
http://www.ncbi.nlm.nih.gov/pmc/articles/PMC5445033PMC
http://dx.doi.org/10.1186/s11671-017-2083-zDOI Listing

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