We present a System-On-Chip Field Programmable Analog Array (FPAA) for analyzing and processing the signals off an accelerometer for a wearable joint health assessment device. FPAAs have been shown to compute with an efficiency of 1000 times, as well as area efficiencies of 100 times, more than digital solutions. This work presents a low power signal processing system which allows us to extract features from the output of the accelerometer. These features are used by the classifier, implemented using a vector matrix multiplication and a two output 1-winner-take-all, to detect flexion and extension cycles in the subject. The compiled design consumes 0.636 μW of power for the front end analog signal processing chain where as the single layer classifier uses 13 μW of power. Thus the system is highly suitable for wearable applications where power consumption is a major concern. The current FPAA is fabricated in a 0.35 μm CMOS process and is operated at a power supply of 2.5 volts. The Gm-C filters and other circuits are operated in the subthreshold regime of the transistor to obtain the highest transconductance to current ratio offered by the process.

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http://dx.doi.org/10.1109/EMBC.2016.7591797DOI Listing

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