Active matrix organic light-emitting diodes (AMOLEDs) are considered to be a core component of next-generation display technology, which can be used for wearable and flexible devices. Reliable thin-film transistors (TFTs) with high mobility are required to drive AMOLEDs. Recently, amorphous oxide TFTs, due to their high mobility, have been considered as excellent substitutes for driving AMOLEDs. However, the device instabilities of high-mobility oxide TFTs have remained a key issue to be used in production. In this paper, we present the charge-trapping and device instability mechanisms of high-mobility oxide TFTs with double active layers, using In-Zn-O (IZO) and Al-doped Sn-Zn-In-O (ATZIO) with various interfacial IZO thicknesses (0-6 nm). To this end, we employed microsecond fast current-voltage (I-V), single-pulsed I-V, transient current, and discharge current analysis. These alternating-current device characterization methodologies enable the extraction of various trap parameters and defect densities as well as the understanding of dynamic charge transport in double-active-layer TFTs. The results show that the number of defect sites decreases with an increase in the interfacial IZO thickness. From these results, we conclude that the interfacial IZO layer plays a crucial role in minimizing charge trapping in ATZIO TFTs.
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http://dx.doi.org/10.1021/acsami.7b01533 | DOI Listing |
ACS Appl Mater Interfaces
December 2024
Department of Applied Bioengineering, Graduate School of Convergence Science and Technology, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Republic of Korea.
A machine learning (ML) strategy is suggested to optimize dual-layer oxide thin film transistor (TFTs) performance. In this study, Bayesian optimization (BO), an algorithm recognized for its efficiency in optimizing material design, is applied to guide the design of a channel layer composed of IZO and IGZO. The sputtering fabrication process, which has attracted attention as an oxide semiconductor channel layer deposition method, is fine-tuned using ML to enhance multiple electrical characteristics of transistors: field-effect mobility, threshold voltage, and subthreshold swing.
View Article and Find Full Text PDFAdv Sci (Weinh)
December 2024
Department of Electrical Engineering, Eindhoven University of Technology, Eindhoven, 5612AP, The Netherlands.
Brain-computer interfaces (BCIs) are evolving toward higher electrode count and fully implantable solutions, which require extremely low power densities (<15mW cm). To achieve this target, and allow for a large and scalable number of channels, flexible electronics can be used as a multiplexing interface. This work introduces an active analog front-end fabricated with amorphous Indium-Gallium-Zinx-Oxide (a-IGZO) Thin-Film Transistors (TFTs) on foil capable of active matrix multiplexing.
View Article and Find Full Text PDFMicromachines (Basel)
October 2024
Department of Information Display, Kyung Hee University, Seoul 02447, Republic of Korea.
Adv Sci (Weinh)
November 2024
Department of Physics, Dongguk University, Seoul, 04620, Republic of Korea.
In this study, the first noncontact and non-destructive methodology is developed for monitoring and imaging the operation and performance of thin-film field-effect transistors (TFTs) using second-harmonic generation (SHG) imaging. By analyzing the SHG signal intensity, which is directly related to the electric field at the interface between the semiconductor channel and gate insulator, critical electrical parameters such as the threshold voltage (V) and flat-band voltage (V) are successfully determined. These findings demonstrate a strong correlation between SHG signals and V and V in InGaZnO TFTs under various process conditions.
View Article and Find Full Text PDFDiscov Nano
November 2024
School of Electronic and Electrical Engineering, Hongik University, Seoul, 04066, Republic of Korea.
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