Impact of Dopant Compensation on Graded p-n Junctions in Si Nanowires.

ACS Appl Mater Interfaces

Department of Physical Electronics-School of Electrical Engineering, Tel Aviv University, Ramat Aviv 69978, Tel Aviv, Israel.

Published: January 2016

The modulation between different doping species required to produce a diode in VLS-grown nanowires (NWs) yields a complex doping profile, both axially and radially, and a gradual junction at the interface. We present a detailed analysis of the dopant distribution around the junction. By combining surface potential measurements, performed by KPFM, with finite element simulations, we show that the highly doped (5 × 10(19) cm(-3)) shell surrounding the NW can screen the junction's built in voltage at shell thickness as low as 3 nm. By comparing NWs with high and low doping contrast at the junction, we show that dopant compensation dramatically decreases the electrostatic width of the junction and results in relatively low leakage currents.

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Source
http://dx.doi.org/10.1021/acsami.5b07746DOI Listing

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