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Coexistence of memory resistance and memory capacitance in TiO2 solid-state devices. | LitMetric

Coexistence of memory resistance and memory capacitance in TiO2 solid-state devices.

Nanoscale Res Lett

Nano Research Group, School of Electronics and Computer Science, University of Southampton, Southampton SO17 1BJ, UK.

Published: October 2014

AI Article Synopsis

Article Abstract

This work exploits the coexistence of both resistance and capacitance memory effects in TiO2-based two-terminal cells. Our Pt/TiO2/TiO x /Pt devices exhibit an interesting combination of hysteresis and non-zero crossing in their current-voltage (I-V) characteristic that indicates the presence of capacitive states. Our experimental results demonstrate that both resistance and capacitance states can be simultaneously set via either voltage cycling and/or voltage pulses. We argue that these state modulations occur due to bias-induced reduction of the TiO x active layer via the displacement of ionic species.

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Source
http://www.ncbi.nlm.nih.gov/pmc/articles/PMC4189047PMC
http://dx.doi.org/10.1186/1556-276X-9-552DOI Listing

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