We present measurements on resonant photodetectors utilizing sub-bandgap absorption in polycrystalline silicon ring resonators, in which light is localized in the intrinsic region of a p+/p/i/n/n+ diode. The devices, operating both at λ=1280 and λ=1550 nm and fabricated in a complementary metal-oxide-semiconductor (CMOS) dynamic random-access memory emulation process, exhibit detection quantum efficiencies around 20% and few-gigahertz response bandwidths. We observe this performance at low reverse biases in the range of a few volts and in devices with dark currents below 50 pA at 10 V. These results demonstrate that such photodetector behavior, previously reported by Preston et al. [Opt. Lett. 36, 52 (2011)], is achievable in bulk CMOS processes, with significant improvements with respect to the previous work in quantum efficiency, dark current, linearity, bandwidth, and operating bias due to additional midlevel doping implants and different material deposition. The present work thus offers a robust realization of a fully CMOS-fabricated all-silicon photodetector functional across a wide wavelength range.
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http://dx.doi.org/10.1364/OL.39.001061 | DOI Listing |
Micromachines (Basel)
December 2024
International Iberian Nanotechnology Laboratory, 4715-330 Braga, Portugal.
The development of low-temperature piezoresistive materials provides compatibility with standard silicon-based MEMS fabrication processes. Additionally, it enables the use of such material in flexible substrates, thereby expanding the potential for various device applications. This work demonstrates, for the first time, the fabrication of a 200 nm polycrystalline silicon thin film through a metal-induced crystallization process mediated by an AlSiCu alloy at temperatures as low as 450 °C on top of silicon and polyimide (PI) substrates.
View Article and Find Full Text PDFPLoS One
January 2025
College of Physics and Electronic Engineering, Hainan Normal University, HaiKou, China.
We have successfully prepared a significant number of nanowires from non-toxic silicon sources. Compared to the SiO silicon source used in most other articles, our preparation method is much safer. It provides a simple and harmless new preparation method for the preparation of silicon nanowires.
View Article and Find Full Text PDFMicromachines (Basel)
December 2024
Department of Civil and Environmental Engineering, Politecnico di Milano, Piazza Leonardo da Vinci, 32, 20133 Milano, Italy.
In the case of repeated loadings, the reliability of inertial microelectromechanical systems (MEMS) can be linked to failure processes occurring within the movable structure or at the anchors. In this work, possible debonding mechanisms taking place at the interface between the polycrystalline silicon film constituting the movable part of the device and the silicon dioxide at the anchor points are considered. In dealing with cyclic loadings possibly inducing fatigue failure, a strategy is proposed to optimize the geometry of an on-chip testing device designed to characterize the strength of the aforementioned interface.
View Article and Find Full Text PDFACS Appl Mater Interfaces
January 2025
Department of Aerospace Engineering, Iowa State University, Ames, Iowa 50014, United States.
Using an interatomic potential that can capture the tetrahedral configuration of water molecules (HO) in ice without the need to explicitly track the motion of the O and H atoms, coarse-grained (CG) atomistic simulations are performed here to characterize the structures, energy, cohesive strengths, and fracture resistance of the grain boundaries (GBs) in polycrystalline ice resulting from water freezing. Taking the symmetric tilt grain boundaries (STGBs) with a tilting axis of ⟨0001⟩ as an example, several main findings from our simulations are (i) the GB energy, , exhibits a strong dependence on the GB misorientation angle, θ. The classical Read-Shockley model only predicts the - θ relation reasonably well when θ < 20° or θ > 45° but fails when 20° < θ < 45°; (ii) two "valleys" appear in the -θ landscape.
View Article and Find Full Text PDFNature
December 2024
Department of Mechanical Engineering, Massachusetts Institute of Technology, Cambridge, MA, USA.
The demand for the three-dimensional (3D) integration of electronic components is steadily increasing. Despite substantial processing challenges, the through-silicon-via (TSV) technique emerges as the only viable method for integrating single-crystalline device components in a 3D format. Although monolithic 3D (M3D) integration schemes show promise, the seamless connection of single-crystalline semiconductors without intervening wafers has yet to be demonstrated.
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