A signal processor/compressor dedicated to implantable neural recording microsystems is presented. Signal compression is performed based on Haar wavelet. It is shown in this paper that, compared to other mathematical transforms already used for this purpose, compression of neural signals using this type of wavelet transform can be of almost the same quality, while demanding less circuit complexity and smaller silicon area. Designed in a 0.13-μm standard CMOS process, the 64-channel 8-bit signal processor reported in this paper occupies 113 μm x 110 μm of silicon area. It operates under a 1.8-V supply voltage at a master clock frequency of 3.2 MHz.
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http://dx.doi.org/10.1109/IEMBS.2011.6091582 | DOI Listing |
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