Wafer-scale patterning of sub-40 nm diameter and high aspect ratio (>50:1) silicon pillar arrays by nanoimprint and etching.

Nanotechnology

Nanostructure Laboratory, Department of Electrical Engineering, Princeton University, Princeton, NJ 08544, USA.

Published: August 2008

We demonstrate wide-area fabrication of sub-40 nm diameter, 1.5 µm tall, high aspect ratio silicon pillar arrays with straight sidewalls by combining nanoimprint lithography (NIL) and deep reactive ion etching (DRIE). Imprint molds were used to pre-pattern nanopillar positions precisely on a 200 nm square lattice with long range order. The conventional DRIE etching process was modified and optimized with reduced cycle times and gas flows to achieve vertical sidewalls; with such techniques the pillar sidewall roughness can be reduced below 8 nm (peak-to-peak). In some cases, sub-50 nm diameter pillars, 3 µm tall, were fabricated to achieve aspect ratios greater than 60:1.

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http://dx.doi.org/10.1088/0957-4484/19/34/345301DOI Listing

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