Recent experiments on ferroelectric gating have introduced a novel functionality, i.e., nonvolatility, in graphene field-effect transistors. A comprehensive understanding in the nonlinear, hysteretic ferroelectric gating and an effective way to control it are still absent. In this Letter, we quantitatively characterize the hysteretic ferroelectric gating using the reference of an independent background doping (n(BG)) provided by normal dielectric gating. More importantly, we prove that n(BG) can be used to control the ferroelectric gating by unidirectionally shifting the hysteretic ferroelectric doping in graphene. Utilizing this electrostatic effect, we demonstrate symmetrical bit writing in graphene-ferroelectric field-effect transistors with resistance change over 500% and reproducible no-volatile switching over 10⁵ cycles.
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http://dx.doi.org/10.1103/PhysRevLett.105.166602 | DOI Listing |
Nat Nanotechnol
January 2025
State Key Laboratory for Mesoscopic Physics, School of Physics, Peking University, Beijing, China.
Interfacial ferroelectricity emerges in non-centrosymmetric heterostructures consisting of non-polar van der Waals (vdW) layers. Ferroelectricity with concomitant Coulomb screening can switch topological currents or superconductivity and simulate synaptic response. So far, it has only been realized in bilayer graphene moiré superlattices, posing stringent requirements to constituent materials and twist angles.
View Article and Find Full Text PDFNat Commun
December 2024
Engineering Science and Mechanics, Penn State University, University Park, PA, USA.
Incipient ferroelectricity bridges traditional dielectrics and true ferroelectrics, enabling advanced electronic and memory devices. Firstly, we report incipient ferroelectricity in freestanding SrTiO nanomembranes integrated with monolayer MoS to create multifunctional devices, demonstrating stable ferroelectric order at low temperatures for cryogenic memory devices. Our observation includes ultra-fast polarization switching (~10 ns), low switching voltage (<6 V), over 10 years of nonvolatile retention, 100,000 endurance cycles, and 32 conductance states (5-bit memory) in SrTiO-gated MoS transistors at 15 K and up to 100 K.
View Article and Find Full Text PDFNanomaterials (Basel)
December 2024
High-Power Converter Systems (HLU), Technical University of Munich (TUM), 80333 Munich, Germany.
In this paper, a new label-free DNA nanosensor based on a top-gated (TG) metal-ferroelectric-metal (MFM) graphene nanoribbon field-effect transistor (TG-MFM GNRFET) is proposed through a simulation approach. The DNA sensing principle is founded on the dielectric modulation concept. The computational method employed to evaluate the proposed nanobiosensor relies on the coupled solutions of a rigorous quantum simulation with the Landau-Khalatnikov equation, considering ballistic transport conditions.
View Article and Find Full Text PDFACS Appl Mater Interfaces
December 2024
Department of Materials Science and Engineering, Pohang University of Science and Technology (POSTECH), Pohang 37673, Republic of Korea.
Ferroelectric transistors based on hafnia-based ferroelectrics have emerged as promising candidates for next-generation memory devices. Additionally, hafnia-based ferroelectric transistors are suggested for three-dimensional (3D) memory devices, such as 3D ferroelectric NAND. This paper investigates the utilization of poly-Si as a gate material for hafnia-based ferroelectric transistors in 3D NAND structures.
View Article and Find Full Text PDFMRS Energy Sustain
August 2024
Department of Materials Science and Metallurgy, University of Cambridge, 27 Charles Babbage Road, Cambridge, CB3 0FS UK.
Abstract: Heterostructures of two-dimensional (2D) materials comprise clean van der Waals (vdW) interfaces that can facilitate charge or energy transfer. Recently, the 2D ferroelectric CuInPS (CIPS) has been integrated with graphene and other 2D materials to realize potentially novel low energy electronic devices. However, the influence of 2D CIPS on the properties of graphene and doping across the vdW interface has not been studied in detail.
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