"Natural" lithography was used to prepare arrays of nanoscale capacitors on silicon. The capacitance was verified by a novel technique based on the interaction of a charged substrate with the electron beam of a scanning electron microscope. The "nanocapacitors" possessed a capacitance of approximately 1 x 10(-16) F and were observed to hold charge for over an hour. Our results indicate that fabricating nanostructures using natural lithography may provide a viable alternative for future nanoelectronic devices.
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| http://dx.doi.org/10.1021/nn800053x | DOI Listing |
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Nanocapacitive circuit elements.
ACS Nano
August 2008
Institute for Nanoscale Technology, University of Technology Sydney, Broadway NSW 2007, Australia.
"Natural" lithography was used to prepare arrays of nanoscale capacitors on silicon. The capacitance was verified by a novel technique based on the interaction of a charged substrate with the electron beam of a scanning electron microscope. The "nanocapacitors" possessed a capacitance of approximately 1 x 10(-16) F and were observed to hold charge for over an hour.
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