This paper reports an integrated optical buffer consisting of a low loss silicon waveguide delay line and a silicon evanescent gate matrix switch. The integrated device demonstrates an error free operation at 40 Gb/s data rate with a packet delay of 1.1 ns. This demonstration also highlights the silicon evanescent device platform to realize new types of photonic integrated devices by combining the low loss silicon passive components with the silicon evanescent photonic active devices.
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| http://dx.doi.org/10.1364/oe.16.011124 | DOI Listing |
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