Nanowire lithography (NWL) uses nanowires (NWs), grown and assembled by chemical methods, as etch masks to transfer their one-dimensional morphology to an underlying substrate. Here, we show that SiO2 NWs are a simple and compatible system to implement NWL on crystalline silicon and fabricate a wide range of architectures and devices. Planar field-effect transistors made of a single SOI-NW channel exhibit a contact resistance below 20 kOmega and scale with the channel width. Further, we assess the electrical response of NW networks obtained using a mask of SiO2 NWs ink-jetted from solution. The resulting conformal network etched into the underlying wafer is monolithic, with single-crystalline bulk junctions; thus no difference in conductivity is seen between a direct NW bridge and a percolating network. We also extend the potential of NWL into the third dimension, by using a periodic undercutting that produces an array of vertically stacked NWs from a single NW mask.
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Micromachines (Basel)
January 2025
State Key Laboratory of High-Performance Precision Manufacturing, Dalian University of Technology, Dalian 116024, China.
The polarization state of light is critical for biological imaging, acousto-optics, bio-navigation, and many other optical applications. Phase shifters are extensively researched for their applications in optics. The size of optical elements with phase delay that are made from natural birefringent materials is limited; however, fabricating waveplates from dielectric metamaterials is very complex and expensive.
View Article and Find Full Text PDFNat Commun
January 2025
School of Electronics Science and Engineering/National Laboratory of Solid-State Microstructures, Nanjing University, Nanjing, China.
Ultrathin silicon nanowires (diameter <30 nm) with strong electrostatic control are ideal quasi-1D channel materials for high-performance field effect transistors, while a short channel is desirable to enhance driving current. Typically, the patterning of such delicate channels relies on high-precision lithography, which is not applicable for large area electronics. In this work, we demonstrate that ultrathin and short silicon nanowires channels can be created through a local-curvature-modulated catalytic growth, where a planar silicon nanowires is directed to jump over a crossing step.
View Article and Find Full Text PDFACS Appl Electron Mater
January 2025
Electrical Engineering Division, Engineering Department, University of Cambridge, Cambridge CB3 0FA, U.K.
Nanoscale semiconductors offer significant advantages over their bulk semiconductor equivalents for electronic devices as a result of the ability to geometrically tune electronic properties, the absence of internal grain boundaries, and the very low absolute number of defects that are present in such small volumes of material. However, these advantages can only be realized if reliable contacts can be made to the nanoscale semiconductor using a scalable, low-cost process. Although there are many low-cost "bottom-up" techniques for directly growing nanomaterials, the fabrication of contacts at the nanoscale usually requires expensive and slow techniques like e-beam lithography that are also hard to scale to a level of throughput that is required for commercialization.
View Article and Find Full Text PDFSmall Methods
January 2025
School of Electrical and Electronic Engineering Nanyang Technological University, 50 Nanyang Avenue, Singapore, 639798, Singapore.
Silicon nanowires (Si NWs) have attracted considerable interest owing to their distinctive properties, which render them promising candidates for a wide range of advanced applications in electronics, photonics, energy storage, and sensing. However, challenges in achieving large-scale production, high uniformity, and shape control limit their practical use. This study presents a novel fabrication approach combining nanoimprint lithography, nanotransfer printing, and metal-assisted chemical etching to produce highly uniform and shape-controlled Si NW arrays.
View Article and Find Full Text PDFNano Lett
January 2025
State Key Laboratory of Low Dimensional Quantum Physics, Department of Physics, Tsinghua University, Beijing 100084, China.
Material challenges are the key issue in Majorana research, where surface disorder constrains device performance. Here, we tackle this challenge by embedding PbTe nanowires within a lattice-constant-matched crystal. The wire edges are shaped by self-organized growth instead of lithography, resulting in nearly atomically flat facets along both cross-sectional and longitudinal directions.
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