Floating Gate (FG) nonvolatile memories are based on a tiny polysilicon layer (the FG) which can be permanently charged with electrons or holes, thus changing the threshold voltage of a MOSFET. Every time a FG is hit by a high energy ion, it experiences a charge loss, depending on the ion linear energy transfer (LET) and on the transistor geometrical and electrical characteristics. This paper discusses the opportunities to use this devices as single an ion dosemeter with sub-micrometer spatial resolution and capable of distinguish the impinging ion LET.
Download full-text PDF |
Source |
|---|---|
| http://dx.doi.org/10.1093/rpd/ncl394 | DOI Listing |
Publication Analysis
Top Keywords
Similar Publications
Large-scale high uniform optoelectronic synapses array for artificial visual neural network.
Microsyst Nanoeng
January 2025
State Key Laboratory of Explosion Science and Safety Protection, Beijing Institute of Technology, Ministry of Education, 100081, Beijing, China.
Recently, the biologically inspired intelligent artificial visual neural system has aroused enormous interest. However, there are still significant obstacles in pursuing large-scale parallel and efficient visual memory and recognition. In this study, we demonstrate a 28 × 28 synaptic devices array for the artificial visual neuromorphic system, within the size of 0.
View Article and Find Full Text PDFOrigin of the Temperature Dependence of Gate-Induced Drain Leakage-Assisted Erase in Three-Dimensional nand Flash Memories.
Micromachines (Basel)
December 2024
Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, 20133 Milan, Italy.
Through detailed experimental and modeling activities, this paper investigates the origin of the temperature dependence of the Erase operation in 3D nand flash arrays. First of all, experimental data collected down to the cryogenic regime on both charge-trap and floating-gate arrays are provided to demonstrate that the reduction in temperature makes cells harder to Erase irrespective of the nature of their storage layer. This evidence is then attributed to the weakening, with the decrease in temperature, of the gate-induced drain leakage (GIDL) current exploited to set the electrostatic potential of the body of the nand strings during Erase.
View Article and Find Full Text PDFLiquid/Liquid Interfacial Assembly of Poly(methyl methacrylate)-Grafted Nanoparticles into Superlattice Monolayers and Their Application as Floating Gates for High Performance Memory.
ACS Appl Mater Interfaces
January 2025
Key Laboratory of Materials Chemistry for Energy Conversion and Storage of Ministry of Education (HUST), State Key Laboratory of Materials Processing and Die & Mold Technology, and Hubei Key Laboratory of Materials Chemistry and Service Failure, School of Chemistry and Chemical Engineering, Huazhong University of Science and Technology (HUST), Wuhan 430074, China.
Polymer/gold nanoparticle (AuNP) composites have been utilized as floating gates to enhance the performance of memory devices. However, these devices typically exhibit a low ON/OFF drain current ratio (/) and unstable charge trapping, attributed to the poorly defined arrangement of AuNPs within the composite floating gate. To address these limitations, this study employs poly(methyl methacrylate)-grafted AuNPs (Au@PMMA) as building blocks for the fabrication of monolayered superlattice films with a highly ordered structure via liquid/liquid interfacial assembly.
View Article and Find Full Text PDFA design TCADAS tool for semiconductor devices and case study of 65 nm conventional floating-gate MOS transistor.
Heliyon
February 2024
Department of Electronics Engineering, Ho Chi Minh City University of Technology (HCMUT), Ho Chi Minh City, 72506, Viet Nam.
An automatic programming tool has become an essential component in virtual fabrication in recent years. This paper aims to propose a methodology of virtual fabrication for semiconductor devices and design a tool called Technology Computer-Aided Design Automatic Simulation (TCADAS) which can perform a completely virtual fabrication, device simulation, process variation, and output extraction. Especially, the TCADAS tool eliminates drudgery when studying semiconductor devices such as complexity in setting inputs, substantial manual work, and long run time of simulations.
View Article and Find Full Text PDFRGB Color-Discriminable Photonic Synapse for Neuromorphic Vision System.
Nanomicro Lett
November 2024
Department of Organic and Nano Engineering & Human-Tech Convergence Program, Hanyang University, Seoul, 04763, Korea.
To emulate the functionality of the human retina and achieve a neuromorphic visual system, the development of a photonic synapse capable of multispectral color discrimination is of paramount importance. However, attaining robust color discrimination across a wide intensity range, even irrespective of medium limitations in the channel layer, poses a significant challenge. Here, we propose an approach that can bestow the color-discriminating synaptic functionality upon a three-terminal transistor flash memory even with enhanced discriminating capabilities.
View Article and Find Full Text PDFWant AI Summaries of new PubMed Abstracts delivered to your In-box?
Enter search terms and have AI summaries delivered each week - change queries or unsubscribe any time!