Silver coated SiN and SiO(2) tips have been fabricated for use with a bottom-illumination tip-enhanced Raman spectroscopy (TERS) setup with a 488 nm laser excitation. SiN tips with 50-60 nm of deposited Ag give the best TERS enhancements for brilliant cresyl blue test analyte spin-coated on a glass slide. Ag nanoparticles on SiN or SiO(2) rather than Si tips are better for TERS because of the proximity of the wavelengths of their surface plasmon resonance to 488 nm. Adjustments of tilt angle of the metallized tip with respect to the surface plane is shown to considerably raise the intensities of the TERS signals, even from tips that initially appear to be rather non-enhancing. This work helps to enable the more frequent use of the 488 nm laser for nanoscale chemical analysis with both TERS and fluorescence imaging in the same setup.
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http://dx.doi.org/10.1366/000370206778664662 | DOI Listing |
The power conversion efficiency of crystalline silicon (c - Si) solar cells have witnessed a 2.1% increase over the last 25 years due to improved carrier transport. Recently, the conversion efficiency of c - Si cell has reached 27.
View Article and Find Full Text PDFSci Rep
October 2024
School of Advanced Materials Science and Engineering, Sungkyunkwan University (SKKU), Suwon, Gyeonggi-Do, 16419, Republic of Korea.
Oxide/Nitride/Oxide/Nitride (ONON; SiO/SiN/SiO/SiN) stacked structure is widely used in the 3D vertical structure of semiconductor cells. Previously, to form a 3D cells, photoresist (PR) was patterned and repeatedly trimmed on the top of ONON after the etching of one ON layer. Due to the time-consuming process of etching layer-by-layer of ON layer, two-step etch processing using CF-based or CF-based gases composed of maskless ONON stack feature etching and followed one ON layer-by layer etching by PR trimming in the ONON stack feature are employed these days.
View Article and Find Full Text PDFSensors (Basel)
June 2024
Center for Wireless Integrated MicroSensing and Systems (WIMS2), University of Michigan, Ann Arbor, MI 48109, USA.
Fabry-Perot interferometers (FPIs), comprising foundry-compatible dielectric thin films on sapphire wafer substrates, were investigated for possible use in chemical sensing. Specifically, structures comprising two vertically stacked distributed Bragg reflectors (DBRs), with the lower DBR between a sapphire substrate and a silicon-oxide (SiO) resonator layer and the other DBR on top of this resonator layer, were investigated for operation in the near-ultraviolet (near-UV) range. The DBRs are composed of a stack of nitride-rich silicon-nitride (SiN) layers for the higher index and SiO layers for the lower index.
View Article and Find Full Text PDFACS Appl Mater Interfaces
March 2024
Intel Corporation, Hillsboro, Oregon 97124-6497, United States.
Area-selective atomic layer deposition (AS-ALD) processes for TiO and TiON on SiN as the growth area vs SiO as the nongrowth area are demonstrated on patterns created by state-of-the-art 300 mm semiconductor wafer fabrication. The processes consist of an in situ CF/N plasma etching step that has the dual role of removing the SiN native oxide and passivating the SiO surface with fluorinated species, thus rendering the latter surface less reactive toward titanium tetrachloride (TiCl) precursor. Additionally, (dimethylamino)trimethylsilane was employed as a small molecule inhibitor (SMI) to further enhance the selectivity.
View Article and Find Full Text PDFAdv Mater
June 2024
School of Microelectronics, University of Science and Technology of China, Hefei, 230026, China.
2D van der Waals (vdW) magnets open landmark horizons in the development of innovative spintronic device architectures. However, their fabrication with large scale poses challenges due to high synthesis temperatures (>500 °C) and difficulties in integrating them with standard complementary metal-oxide semiconductor (CMOS) technology on amorphous substrates such as silicon oxide (SiO) and silicon nitride (SiN). Here, a seeded growth technique for crystallizing CrTe films on amorphous SiN/Si and SiO/Si substrates with a low thermal budget is presented.
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