Publications by authors named "Zuteng Wan"

Silicon is the cornerstone of electronics and photonics. In this context, almost all integrated devices derived from two-dimensional (2D) materials stay rooted in silicon technology. However, as the growth substrate, silicon has long been thought to be a hindrance for growing 2D materials through bottom-up methods that require high growth temperatures, and thus, indirect routes are usually considered instead.

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Organic field-effect transistors (OFETs) with polymer charge-trapping dielectric, which exhibit many advantages over Si-based memory devices such as low cost, light weight, and flexibility, still suffer challenges in practical application due to the unsatisfied endurance characteristics and even the lack of fundamental of behind mechanism. Here, we revealed that the degradation of endurance characteristics of pentacene OFET with poly(2-vinyl naphthalene) (PVN) as charge-storage layer is dominated by the deep hole-traps in PVN by using the photo-stimulated charge de-trapping technique with the fiber-coupled monochromatic-light probes. The depth distribution of hole-traps in PVN film of pentacene OFET is also provided.

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Organic field-effect transistors (OFETs) as nonvolatile memory units are essential for lightweight and flexible electronics, yet the practical application remains a great challenge. The positively charged defects in pentacene film at the interface between pentacene and polymer caused by environmental conditions, as revealed by theoretical and experimental research works, result in unacceptable high programming/erasing (P/E) gate voltages in pentacene OFETs with polymer charge-trapping dielectric. Here, we report a pentacene OFET in which an n-type semiconductor layer was intercalated between a polymer and a blocking insulator.

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